Timing recovering apparatus having window periods determined by

Details Timing recovering apparatus having window periods determined by Timing recovering apparatus having window periods determined by

1995-02-21

1996-02-06

Chin, Stephen

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

375293, H03D 324, H04L 2549

Patent

active

054901812

ABSTRACT:
A timing recovering apparatus comprises an equalizer for equalizing a digital data signal subjected to interleaved NRZI such that the digital data signal has partial response (1, 0, -1), two comparators for comparing the equalized data signal with two different reference levels, two phase comparing portions for detecting phase difference between the outputs of the comparators and a reproduced clock signal separately, an adder for summing the outputs of the phase comparators, and a VCO for generating the reproduce clock signal in accordance with the output of the adder. This timing recovering apparatus performs phase comparing with two different phase comparators and PLL control is performed on the sum of the outputs of the two different phase comparators, so that the clock signal is not affected by data pattern of the data signal. An automatic slice apparatus comprises the equalizer for equalizing a digital data signal subjected to interleaved NRZI, and two comparators supplied with reference levels, and the timing recovering apparatus, detects amplitude of the output of the equalizer in response to the reproduced clock signal to compensate the reference levels.

REFERENCES:
patent: 4888564 (1989-12-01), Ishigaki
patent: 5003555 (1991-03-01), Fujiyama
"Application of Partial-response Channel Coding to Magnetic Recording Systems" by H. Kobayashi et al, IBM J. Res. Develop. Jul. 1970, pp. 368-375.
"Optimum discrimination of digitized signal" by M. Yamashita, et al. pp. 28-31 (w/ partial English translation).
"NRZI, interleaved MRZI mark" by Y. Eto, et al, pp. 35-45 (w/ partial English translation).
Electronicom '85 vol. 1, 6 Oct. 1985, Toronto, pp. 178-180, R. Gangopadhyay et al `clock recovery of distorted MRZ signal in an optical receiver employing avalanche photodetector`.
Comsat Technical Review vol 15, No. 2B, 1985, Washington US, pp. 423-432, C. J. Wolejsza et al `120-Mbit/s TDMA modem and FEC codec performance`.
Custom Integrated Circuits Conference No. 7.2, May 1989, San Diego, California, pp. 712-724, R. S. Co et al `a differential PLL architecture for high speed data recovery`.

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