Timing path detailer

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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Details

C716S030000, C716S030000

Reexamination Certificate

active

07000206

ABSTRACT:
A method (and a computer accessible medium comprising one or more instructions which, when executed, implement the method) is contemplated. At least a first timing path is identified in a first timing report corresponding to a first partition of a circuit. For at least one timing constraint applied to the first timing path, a second timing path in a second partition of the circuit that causes the timing constraint is determined. A second timing report comprising the first timing path from the first timing report and the second timing path from the second partition is generated.

REFERENCES:
patent: 5872717 (1999-02-01), Yu et al.
patent: 2003/0131328 (2003-07-01), Barrick et al.
patent: 2003/0188268 (2003-10-01), Konstadinidis et al.

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