Timing generator, and timing generating method

Details Timing generator, and timing generating method Timing generator, and timing generating method

2007-08-14

2007-08-14

Raymond, Edward (Department: 2857)

Data processing: measuring, calibrating, or testing

Testing system

Signal generation or waveform shaping

C702S079000, C702S176000, C348S312000, C714S731000, C340S003200

Reexamination Certificate

active

11223892

ABSTRACT:
There is provided a timing generator that outputs a second periodic signal having a desired phase difference to a first periodic signal by superimposing a voltage on a control voltage of a voltage-controlled oscillating unit of a PLL circuit for generating the second periodic signal. The timing generator includes an initializing unit for measuring a timing shift gain indicative of a ratio of a timing shift amount to a change of a superimposed voltage and a voltage generating unit for generating the superimposed voltage based on the desired phase difference and the timing shift gain. The initializing unit harmonizes the phase of the first periodic signal with the phase of the second periodic signal, sequentially changes the superimposed voltage, detects an amount of change of the superimposed voltage when the phase of the first periodic signal and the phase of the second periodic signal are identical with each other once more, and computes a timing shift gain based on the change amount of the superimposed voltage and an amount of change of the phase of the second periodic signal.

REFERENCES:
patent: 6134276 (2000-10-01), Aman et al.
patent: 6151071 (2000-11-01), Petilli
patent: 6727957 (2004-04-01), Sato
Kurita et al., ‘PLL-Based BiCMOS On-Chip Clock Generator for Very High-Speed Microprocessor’, Apr. 1991, IEEE Publication, vol. 26, No. 4, pp. 585-589.
Ronan et al., ‘Timing and RF Synchronization for Filling PEP/SPEAR with the SLC Damping Rings’, 1989, IEEE Publication, pp. 1577-1579.

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