Timing controller to reduce flicker and method of operating...

Computer graphics processing and selective visual display system – Display driving control circuitry – Waveform generator coupled to display elements

Reexamination Certificate

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Reexamination Certificate

active

07965286

ABSTRACT:
A timing controller to reduce a flicker in a display device is provided. The timing controller includes a line pattern detector and a frame pattern detector. The line pattern detector divides received data into a plurality of unit blocks and detects a line polarity of each of a plurality of horizontal lines included in each of the unit blocks. The frame pattern detector generates a polarity control signal to control a data inversion method based on a frame image pattern detected based on line polarities of the respective horizontal lines.

REFERENCES:
patent: 2002/0130830 (2002-09-01), Park
patent: 2005/0001829 (2005-01-01), Bu et al.
patent: 2003-216124 (2003-07-01), None
patent: 2006-284825 (2006-10-01), None
patent: 2001-80830 (2001-08-01), None
patent: 2003-58140 (2003-07-01), None
patent: 2006-71573 (2006-06-01), None
Korean Office Action dated Dec. 17, 2007 issued in KR 2007-18998.

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