Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2008-07-29
2008-07-29
Do, Thuan (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000
Reexamination Certificate
active
11295351
ABSTRACT:
A method of enabling CRPR in an ETM. In an exemplary embodiment, the method includes locating a plurality of clocks defined within a core. The method may also include determining if one of the plurality of clocks are clocking data both within the core and outside of the core. A CRPR clock for an output pin of a last cell in a clock path common to an internal register clock pin and one of the plurality of clocks clocking data clocking data both within the core and outside of the core may be defined. A static timing analysis tool may be employed to calculate the CRPR from the CRPR clock.
REFERENCES:
patent: 7278126 (2007-10-01), Sun et al.
patent: 2002/0073389 (2002-06-01), Elboim et al.
Do Thuan
LSI Corporation
Suiter Swantz PC LLO
LandOfFree
Timing constraints methodology for enabling clock... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Timing constraints methodology for enabling clock..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Timing constraints methodology for enabling clock... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3933288