Timing constraints methodology for enabling clock...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000, C716S030000, C716S030000

Reexamination Certificate

active

11295351

ABSTRACT:
A method of enabling CRPR in an ETM. In an exemplary embodiment, the method includes locating a plurality of clocks defined within a core. The method may also include determining if one of the plurality of clocks are clocking data both within the core and outside of the core. A CRPR clock for an output pin of a last cell in a clock path common to an internal register clock pin and one of the plurality of clocks clocking data clocking data both within the core and outside of the core may be defined. A static timing analysis tool may be employed to calculate the CRPR from the CRPR clock.

REFERENCES:
patent: 7278126 (2007-10-01), Sun et al.
patent: 2002/0073389 (2002-06-01), Elboim et al.

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