Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2007-11-20
2007-11-20
Chiang, Jack (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
Reexamination Certificate
active
10458537
ABSTRACT:
An apparatus and a system, as well as a method and article, may operate to include receiving initial static timing environment data associated with a circuit at a graphical user interface, and generating a data file including a plural of all possible sources of a generated clock included in the circuit.
REFERENCES:
patent: 6014510 (2000-01-01), Burks et al.
patent: 6877139 (2005-04-01), Daga
Clement Manuel S.
Mohiuddin Sadiq
Trivedi Vivek
Bowers Brandon
Chiang Jack
Intel Corporation
Schwegman Lundberg & Woessner, P.A.
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