Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
2003-12-02
2010-10-19
Tsai, Sheng-Jen (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
C711S157000
Reexamination Certificate
active
07818519
ABSTRACT:
A method for arbitrating between a plurality of access requests issued in relation to a resource by a plurality of requestors, wherein each request can be one of at least two types, a first of the types having a higher latency associated with its performance than at least some of the other types, the method including the steps of: (a) receiving a plurality of the access requests; (the requests are not placed anywhere, they are simply received); (b) maintaining a current pointer that points to a current timeslot in a timeslot list, and at least one lookahead pointer that points to a future timeslot in the timeslot list; and (c) in the event an access request as arbitrated via the lookahead pointer is of the first type, initiating performance of the access request earlier than the position in the list suggests it would be performed should it be started when the current pointer reached the timeslot.
REFERENCES:
patent: 5537556 (1996-07-01), Mundkur
patent: 5603063 (1997-02-01), Au
patent: 5606703 (1997-02-01), Brady et al.
patent: 5987576 (1999-11-01), Johnson et al.
patent: 6112265 (2000-08-01), Harriman et al.
patent: 6202101 (2001-03-01), Chin et al.
patent: 6354689 (2002-03-01), Couwenhoven et al.
patent: 6526484 (2003-02-01), Stacovsky et al.
patent: 6581111 (2003-06-01), Lakhanpal et al.
patent: 6601151 (2003-07-01), Harris
patent: 6741253 (2004-05-01), Radke et al.
patent: 6816923 (2004-11-01), Gray et al.
patent: 6829689 (2004-12-01), Van Dyke
patent: 6925539 (2005-08-01), Mowery et al.
patent: 2002/0060707 (2002-05-01), Yu et al.
patent: 2002/0199127 (2002-12-01), Pitot et al.
patent: 2003/0217239 (2003-11-01), Jeddeloh
patent: 863004 (1998-09-01), None
patent: 0963854 (1999-12-01), None
patent: 974467 (2000-01-01), None
patent: 983855 (2000-03-01), None
patent: 1157840 (2001-11-01), None
patent: 98/40222 (1998-09-01), None
patent: 99/08875 (1999-02-01), None
patent: WO 00/64679 (2000-11-01), None
Jason Rush, “Southbridge - a whatis definition,” http://web.archive.org/web/20011109081816/http://riot.ieor.berkeley.edu/˜vinhun/algorithms.html, Nov. 9, 2001, pp. 1-4.
“RIOT-The Scheduling Problem,” http://web.archive.org/web/20010802114625/http://whatis.techtarget.com/definition/0,,sid9—gci750982,00.html, Aug. 2, 2001, pp. 1-3.
Chrzanowski Matthew R
Silverbrook Research Pty Ltd
Tsai Sheng-Jen
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