Timesliced discrete-time phase locked loop

Details Timesliced discrete-time phase locked loop Timesliced discrete-time phase locked loop

2007-07-24

2007-07-24

Patel, Jay K. (Department: 2611)

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

C375S371000, C375S373000, C329S307000, C327S147000, C327S156000, C332S127000, C332S128000, C702S072000

Reexamination Certificate

active

10671872

ABSTRACT:
A time-sliced discrete-time Phase Locked Loop which is suitable for simultaneously synchronizing multiple input signals to multiple output signals is provided by implementing a discrete-time phase detector, loop filter, and voltage controlled oscillator that together operate as a single discrete-time PLL in hardware and applying control logic to retrieve the history for each signal pair from a context memory (RAM), to enable the discrete-time PLL hardware, and to store the resulting history in the context memory for use in subsequent operations for a particular input/output signal pair.

REFERENCES:
patent: 4703520 (1987-10-01), Rozanski et al.
patent: 5933058 (1999-08-01), Pinto et al.
patent: 2001/0015678 (2001-08-01), Wesolowski
patent: 11220389 (1999-08-01), None

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