Electrical computers and digital data processing systems: input/ – Access arbitrating
Reexamination Certificate
2005-10-31
2008-12-16
Knoll, Clifford H (Department: 2111)
Electrical computers and digital data processing systems: input/
Access arbitrating
C711S152000, C370S401000
Reexamination Certificate
active
07467247
ABSTRACT:
A computer-implemented method of generating timeout errors based on shared register access by two processors is described. A processor access timer is started responsive to generation of an access request by a first processor. The generated first processor access request is transmitted to a shared storage component including a shared register and able to communicate with both the first and second processors. A timeout error is generated responsive to the processor access timer exceeding a processor predetermined timeout threshold value.
REFERENCES:
patent: 6301642 (2001-10-01), Jones et al.
patent: 6970476 (2005-11-01), Jonsson et al.
patent: 7051150 (2006-05-01), Naumann et al.
patent: 7197016 (2007-03-01), Belcea
patent: 2006/0268925 (2006-11-01), Sarkar
Hewlett--Packard Development Company, L.P.
Knoll Clifford H
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