Electronic digital logic circuitry – Multifunctional or programmable – Array
Patent
1997-10-31
1999-11-16
Nelms, David
Electronic digital logic circuitry
Multifunctional or programmable
Array
326 38, 326 39, G06F 738
Patent
active
059864672
ABSTRACT:
Described are a method and circuit for time-multiplexing two or more PLDS. The invention allows a pair of PLDs to sequentially perform more than two logic functions. The PLDs share common input and output nodes. The output nodes of each PLD may be tri-stated so that either PLD can be active (i.e., perform some logic function) at any given instant without logic conflicts on the common output nodes. A configurable-logic modification (CLM) circuit determines which PLD is active. The CLM circuit can selectively modify the logical configuration of one PLD while the other PLD actively performs some logical operation and provides the result of that logical operation on the common output nodes. The CLM circuit can then deactivate the active PLD and activate the newly configured second PLD to implement the second logic function. The formerly active PLD, now inactive, may then be reconfigured to perform yet another logical operation while the second PLD actively performs the second logical operation and provides the result of that logical operation on the common output nodes.
REFERENCES:
patent: 5338982 (1994-08-01), Kawana
patent: 5426378 (1995-06-01), Ong
patent: 5646545 (1997-07-01), Trimberger et al.
patent: 5764076 (1998-06-01), Lee et al.
An Application Note by Wilkie, Bill, entitled, "Interfacing XC6200 to Microprocessors (MC68020 Example)," Sep. 1995, available from Xilinx Inc., 2100 Logic Drive, San Jose, California 95124.
"The Programmable Logic Data Book" copyright 1996, Xilinx, Inc., 2100 logic Drive, San Jose, CA 95124.
Behiel Arthur J.
Nelms David
Nguyen Tuan T.
Xilinx , Inc.
Young Edel M.
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