Tiered secondary memory architecture to reduce power...

Electrical computers and digital processing systems: support – Computer power control – Power conservation

Reexamination Certificate

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Details

C713S300000, C713S320000, C713S321000, C713S322000, C713S324000, C360S069000, C360S075000, C711S100000, C711S114000, C711S154000

Reexamination Certificate

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07093149

ABSTRACT:
A computer system that optimizes the power efficiency of a portable computer system is described. Specifically, the secondary memory of the system is partitioned. A standard hard disk drive is used to store lower utilization applications, while a micro storage unit is used to store high utilization applications.

REFERENCES:
patent: 6009518 (1999-12-01), Shiakallis
patent: 6052781 (2000-04-01), Weber
patent: 6088794 (2000-07-01), Yoon et al.
patent: 6628469 (2003-09-01), Hoyt
patent: 6651099 (2003-11-01), Dietz et al.
patent: 6851030 (2005-02-01), Tremaine
patent: 6910210 (2005-06-01), Chew
patent: 2003/0145166 (2003-07-01), Miwa et al.

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