Coating apparatus – Gas or vapor deposition – Multizone chamber
Reexamination Certificate
2000-04-29
2003-01-21
Lund, Jeffrie R. (Department: 1763)
Coating apparatus
Gas or vapor deposition
Multizone chamber
C118S728000, C118S500000, C156S345310, C156S345320, C156S345510
Reexamination Certificate
active
06508883
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to semiconductor manufacturing process systems, and particularly to an enhanced throughput method and apparatus for processing semiconductor wafers in a single wafer reactor.
2. Description of the Art
In the manufacture of semiconductor materials and device structures by deposition of thin film materials, a variety of deposition systems are in conventional use. These deposition systems include a reaction chamber in which the wafer substrate is heated to a high temperature in the presence of a vapor phase source material to deposit the desired thin film on the wafer surface.
Silicon epitaxial films are typically deposited in two general types of reactors. The older type is a batch reactor, which holds many wafers at a time. Batch reactors have progressively grown in size, driven by the desire for increased throughput. A state of the art batch reactor can hold 34 100 mm diameter wafers and 18 150 mm diameter wafers. A typical process time for a batch reactor is several hours; thus, throughputs of tens of wafers per hour can be achieved. Nonetheless, the large area required to hold such numbers of multiple wafers (the wafer carrier or the susceptor in such large system is on the order of 30 inches in diameter) results in less than desirable uniformity across all wafers. The susceptors in such large systems typically have two or more concentric rows of wafers, and the characteristics in each row can be significantly different. In order to achieve improved uniformity, especially on large diameter wafers (150 mm and larger), single wafer reactors were developed.
Single wafer reactors have a process chamber that is only slightly larger than the wafer diameter. This results in improved control of the processing conditions and thus yields improved uniformity of the product thin films. The characteristics of primary importance in the product thin film are uniformity of film thickness and uniformity of film resistivity of the silicon epitaxial thin film. Typical process time for a single wafer reactor is on the order of
10-20
minutes with relatively thin (<30 micrometers thickness) epitaxial films, resulting in a throughput of
3-6
wafers per hour.
For large area substrates, single wafer reaction chambers provide very high uniformity, reproducibility, and yield. Multiple-wafer reaction chambers are typically not able to achieve the same levels of uniformity and reproducibility, and the performance of multiple-wafer reaction chambers degrades significantly as the substrate diameter increases. In single wafer deposition systems, the throughput, expressed as the number of substrates processed per unit time, does not change dramatically with the substrate area. Thus, a 100 mm diameter substrate requires almost the same amount of time for processing as a 200 mm diameter substrate. The decreased processing time for the smaller substrate in a single substrate reactor is on the order of
5-15%
. In contrast, multi-substrate reactors are able to achieve large increases in throughput with decreasing substrate area. By way of illustration, a typical barrel reactor (see, for example, U.S. Patent No. 4,099,041 issued Jul. 4, 1978 to Berkman et al. for “Susceptor for Heating Semiconductor Substrates”) may hold fifteen 150 mm diameter substrates, eighteen 125 mm substrates, and twenty-eight 100 mm substrates. There is thus a dramatic improvement in throughput for smaller diameter substrates.
As a result of this greater throughput efficiency, single wafer deposition tools are not cost-competitive with multi-substrate reactors for smaller diameter substrates. This disadvantage, however, must be balanced against the greater uniformity and reproducibility achievable in processing smaller diameter substrates in single wafer deposition chambers. Further, there is a large existing base of installed single wafer deposition systems.
U.S. Patent No. 5,855,681 issued Jan. 5, 1999 to Mayden, et al. for “Ultra High Throughput Wafer Vacuum Processing System” discloses one approach to the problem of achieving high throughput of wafers. The disclosure of such patent is incorporated herein by reference in its entirety. Mayden provides a complex apparatus utilizing a plurality of dual wafer processing chambers arrayed around a common wafer handling system (robot), together with a loadlock chamber for introducing and extracting wafers from the system. The Mayden system is an integrated, stand-alone wafer processing system comprising multiple complex sub-functions, and thus entails an intricate and expensive apparatus requiring correspondingly complex and expensive support systems.
There is accordingly a need in the art to provide a thin film deposition system for smaller diameter substrates that improves operating efficiency by processing a significantly greater number of wafers per unit time, while retaining the significant advantages of uniformity and reproducibility that are characteristic of a single wafer deposition chamber, in a relatively simple and economic apparatus configuration.
It is one object of the invention to provide an improved reactor system for epitaxial thin film formation.
It is another object of the present invention to provide a means and method for improving the throughput and operational efficiency of a single wafer reactor.
It is a further object of the present invention to provide an increased throughput thin film deposition processing system for smaller diameter wafers, utilizing existing single wafer reaction chambers and their associated (existing) wafer handling and processing systems.
It is a still further object of the present invention to provide an increased throughput thin film deposition processing system for smaller diameter wafers, utilizing existing single wafer reaction chambers and their associated (existing) wafer handling and processing systems, in a manner that minimizes new expenditure requirements and maximizes utilization of existing investment in semiconductor processing equipment.
Other objects and advantages of the present invention will be more fully apparent from the ensuing disclosure and appended claims.
SUMMARY OF THE INVENTION
The present invention relates to an enhanced throughput method and apparatus for processing plural semiconductor wafers in a single wafer reactor.
The method and apparatus of the invention are therefore amenable to implementation as a retrofit modification of an existing single wafer reactor, to enhance the throughput capacity thereof.
In one aspect, the invention relates to a semiconductor substrate processing system, comprising:
a reactor comprising a single substrate deposition chamber; and
a wafer holder positionable in the deposition chamber, having a plurality of recesses formed therein, with each of such recesses being arranged and configured to hold a correspondingly sized substrate therein.
In another aspect, the invention relates to a method of increasing the throughput of a semiconductor processing system including a reactor comprising a single substrate deposition chamber, by positioning in the deposition chamber a substrate holder having a plurality of recesses formed therein, with each of said recesses being arranged and configured to hold a correspondingly sized substrate therein.
Other aspects, features and embodiments of the invention will be more fully apparent from the ensuing disclosure and claims.
REFERENCES:
patent: 4099041 (1978-07-01), Berkman et al.
patent: 4566726 (1986-01-01), Correnti et al.
patent: 4775281 (1988-10-01), Prentakis
patent: 4801241 (1989-01-01), Zajac et al.
patent: 4951601 (1990-08-01), Maydan et al.
patent: 5442416 (1995-08-01), Tateyama et al.
patent: 5626677 (1997-05-01), Shirahata
patent: 5820686 (1998-10-01), Moore
patent: 5855681 (1999-01-01), Mayden et al.
patent: 5879459 (1999-03-01), Gadgil et al.
patent: 6053980 (2000-04-01), Suda et al.
Webster's II New Riverside University Dictionary, The Riverside Publishing Company, p. 291, 1984.
Advanced Technology & Materials Inc.
Chappuis Margaret
Hultquist Steven J.
Lund Jeffrie R.
Ryann William
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