Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2007-05-03
2010-11-09
Such, Matthew W (Department: 2891)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
Reexamination Certificate
active
07829462
ABSTRACT:
A through-wafer via interconnect region is in a circuit portion of a wafer, the circuit portion including at least one electrically conducting metal layer and configured for use, after dicing of the wafer, as one of a plurality of layers stacked vertically to form a three dimensional integrated circuit. Within the metal layer in the circuit portion, the metal is removeably distributed such that the ratio of metal to nonmetal area, within the via region, varies by less than a predetermined amount from the ratio of metal to nonmetal area outside the via region.
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DeNatale Jeffrey F.
Lauxtermann Stefan C.
Koppel, Patrick, Heybl & Dawson
Naraghi Ali
Such Matthew W
Teledyne Licensing LLC
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