Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2009-04-16
2011-11-22
Everhart, Caridad (Department: 2895)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S620000, C216S017000, C257SE21597, C257SE21586
Reexamination Certificate
active
08062975
ABSTRACT:
Through substrate vias (TSVs) are provided after substantially all high temperature operations needed to form a device region (26) of a first thickness (27) proximate the front surface (23) of a substrate wafer (20, 20′) by: (i) from the front surface (23), forming comparatively shallow vias (30, 30′) of a first aspect ratio containing first conductors (36, 36′) extending preferably through the first thickness (27) but not through the initial wafer (20) thickness (21), (ii) removing material (22″) from the rear surface (22) to form a modified wafer (20′) of smaller final thickness (21′) with a new rear surface (22′), and (iii) forming from the new rear surface (22′), much deeper vias (40, 40′) of second aspect ratios beneath the device region (26) with second conductors (56, 56′) therein contacting the first conductors (36, 36′), thereby providing front-to-back interconnections without substantially impacting wafer robustness during manufacturing and device region area. Both aspect ratios are desirably about ≦40, usefully ≦10 and preferably ≦5.
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PCT Application No. PCT/US2010/028297; Search Report and Written Opinion dated Dec. 15, 2010.
Petras Michael F.
Ramiah Chandrasekaram
Sanders Paul W.
Everhart Caridad
Freescale Semiconductor Inc.
Ingrassia Fisher & Lorenz PC
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