Patent
1996-06-11
1998-03-10
Sheikh, Ayaz R.
395444, 395490, G06F 1300
Patent
active
057271674
ABSTRACT:
A thresholding mechanism and method for performance monitoring of memory array access distribution times is disclosed. A data request signal sent to the memory hierarchy activates a first counter, having a first count value. A clock coupled to the first counter increments the first count value with each clock cycle, while also decrementing a decrementer having a predetermined threshold value. The first counter is deactivated by a completion signal when the data request is completed. A second counter having a second count value is incremented when the first count value is greater than the threshold value by the time the data request is complete.
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Dwyer, III Harry
Levine Frank Eliot
Welbon Edward Hugh
Wright Charles Gordon
England, Jr. Anthony V.
International Business Machines - Corporation
Sheikh Ayaz R.
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