Error detection/correction and fault detection/recovery – Pulse or data error handling – Error count or rate
Reexamination Certificate
2000-03-22
2003-02-25
Chung, Phung M. (Department: 2784)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Error count or rate
Reexamination Certificate
active
06526531
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to decoding of encoded data by a receiver in a telecommunication network, and, more particularly, to reducing the number of iterations of an iterative decoder.
2. Description of the Related Art
Many communication systems employ 1) multi-dimensional encoding of data with convolutional codes and 2) iterative decoding of the encoded data due to the relatively high coding gain and simple structure of an iterative decoder. Iterative decoding methods may employ “soft-in, soft-out” decoders for decoding data. In an iterative decoding scheme, encoded data is repetitively decoded until a predetermined number of decoding iterations complete.
The following may be of use to understand the encoding and decoding methods. A set of binary values u is defined in the Galois field-2(GF(2)) with elements {+1, −1} where −1 is the “null” element under modulo-2 addition. The reliability value, or soft value, L(u) is the log-likelihood ratio of the binary random values in U and is defined as the (natural) log of the ratio of the probability that the random variable U takes on the value u=+1 (logic 2) to the probability that the random variable U takes on the value u=−1 (logic 0). The sign of L(u) is used as a hard decision by a detector or decoder, and the magnitude of L(u) is used as a reliability statistic (value) for the hard decision.
In an iterative decoding scheme, the reliability values based on the information bits are updated at each iteration, utilizing the information extracted from the previous iteration. Decoding produces a posteriori reliability values for the output, decoded data. The a priori reliability values may either be the null set (logic 0 or 1, depending on definition) for the first iteration (since there is no a priori information) or, after the first iteration, extrinsic reliability values for the information bits from a previous iteration. The extrinsic reliability values are values based on indirect information contained in the decoded information bits, and may be generated from the a posteriori reliability values. In general, the a posteriori reliability values and/or the extrinsic reliability values of an iteration are employed as extrinsic information input to a decoder for decoding data during the next iteration.
FIG. 1
shows an iterative decoder
100
as may be employed in a turbo decoder of the prior art operating in accordance with, for example, the CDMA-2000 standard. The iterative decoder receives encoded data that may be formed as follows. A frame of data is encoded with a first block code and a first parity bit X
P1
is added to the encoded frame of data. The frame of data is also interleaved with mapping f(*) and encoded with a second block code (which may be equivalent to the first block code), and a second parity bit X
P2
is added to the encoded frame of data. The encoded data is combined with the interleaved and encoded data to form a set of systematic bits X
S
(e.g., using a product code).
The iterative decoder includes first and second decoders
101
and
104
, interleavers
102
and
109
each applying the mapping f(*) to input data, de-interleaver
106
applying the inverse of the mapping f(*) to input data, and optional buffers
103
,
105
,
107
,
108
, and
110
used to temporarily store values during the decoding process. First and second decoders
101
and
104
apply respective decoding operations D
1
(the inverse of the first block code) and D
2
(the inverse of the second block code).
The iterative decoder completes one iteration as follows. First decoder
101
receives systematic bits X
S
(via
111
) and parity bits X
P1
(via
112
) of the received frame from, for example, an external memory
120
. First decoder
101
also receives extrinsic information (e.g., both the reliability values (soft-data representing values for the decoded frame of data) and extrinsic reliability values) from buffer
107
(via
114
). Extrinsic information for one decoder may be derived from the de-interleaved, decoded frame of data from the other decoder and parity bits X
P1
and/or and parity bits X
P2
. For the first iteration, the extrinsic information provided to first decoder
101
may be initialized to the null set (logic 0 or 1, depending on definition). First decoder
101
performs decoding operation D
1
on the systematic bits X
S
using the extrinsic information and parity bits X
P1
to generate soft data. The soft data from first decoder
101
is then interleaved by interleaver
109
, and the interleaved soft data is provided as extrinsic information for second decoder
104
(via
115
). Systematic bits X
S
are also interleaved by interleaver
102
.
Second decoder
104
receives the interleaved extrinsic information (via
115
), the parity bits X
P2
(via
113
), and the interleaved systematic bits X
S
(via
116
), and performs decoding operation D
2
to generate soft data. The soft data from second decoder
104
is then de-interleaved by de-interleaver
106
and provided as the extrinsic information (via
114
) for decoding the systematic bits X
S
in the next iteration by first decoder
101
, thus ending a single iteration of decoder
100
. Several iterations may be required to generate a decoded frame of data from the systematic bits X
S
and parity bits X
P1
and X
P2
to satisfy a predetermined threshold for bit error rate (BER) of the iterative decoder. Half of an iteration is defined to be all the operations around one of the two decoders
101
and
104
.
After N iterations, the turbo decoder combines the extrinsic information from both decoders
101
and
104
with the systematic bits X
S
from the received frame to form the so called soft outputs against which the decision on the transmitted bits are made. In this iteration process, every frame of encoded data requires N iterations to decode, thus the number of computations is fixed. In general, more iterations of the iterative decoding process result in a lower bit error rate (BER) for the decoded output data. For typical implementations of the prior art turbo decoder of
FIG. 1
, 10 to 20 iterations may be needed for satisfactory BER of a decoded frame when signal-to-noise ratio (SNR) is low. Since the number of computations of a circuit implementing the iterative decoder is directly proportional to the number of iterations required for decoding, more iterations generally result in higher power consumption for the circuit. Consequently, improving the BER performance of the circuit is generally achieved at the expense of increased power consumption.
FIG. 2
shows simulated turbo decoder performance as BER versus SNR for different numbers of iterations for the iterative decoder of FIG.
1
. The signals are modulated, encoded frames of 20,730 bits that are transmitted through a communication channel adding white, Gaussian noise to the signal. Referring to
FIG. 2
, higher numbers of iterations generally result in lower BER for the decoded frame. For relatively high SNR (greater than 0.9 dB in FIG.
2
), a point (number of iterations) exists where more iterations do not necessarily result in lower BER. Typical choices for the total number N of decoding iterations are generally between 8 and 12 iterations for moderate to high SNR. However, the iterative decoding process may exhibit abnormalities when higher numbers of iterations are employed. For example, a plot of the BER curve versus number of iterations may not be monotonically decreasing (i.e., the BER may actually be worse with more iterations); and (ii) given a fixed number of iterations, BER may not be monotonically decreasing with the SNR of the input signal. Pathetic decoded frames of data in which errors may grow with more iterations cause the BER abnormality.
Methods of the prior art to reduce the number of computations, and hence the power consumption in the particular circuit implementation of the iterative decoder, focus on comparing the decoded output of two consecutive iterations, or occasio
Agere Systems Inc.
Chung Phung M.
Hughes Ian M.
Mendelsohn Steve
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