Three transistor dual port dynamic random access memory gain cel

Details Three transistor dual port dynamic random access memory gain cel Three transistor dual port dynamic random access memory gain cel

1989-10-13

1992-04-14

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Plural use of terminal

36518901, G11C 1300

Patent

active

051053870

ABSTRACT:
The present invention relates generally to single instruction, multiple data processors. More particularly, the invention relates to processors having a one dimensional array of processing elements, that finds particular application in digital signal processing such as Improved Definition Television (IDTV). Additionally, the invention relates to improvements to the processors, television and video systems and other systems improvements and methods of their operation and control.

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Chin, D. et al., The Princeton Engine: A Real-Time Video System Simulator, IEEE Transactions on Consumer Electronics, vol. 34, No. 2, May 1988, pp. 285-297.
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Hillis, W. Daniel, text book excerpt, The Connection Machine, The MIT Press series in artificial intelligence-Thesis (Ph.D.)-MIT, 1985, pp. 18-28.
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Gharachorloo, Nader et al., A Super Buffer: A Systolic VLSI Graphics Engine for Real-Time Raster Image Generation, 1985 Chapel Hill Conference on VLSI, pp. 285-305.

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