Static information storage and retrieval – Systems using particular element – Flip-flop
Reexamination Certificate
2005-02-22
2005-02-22
Phan, Trong (Department: 2818)
Static information storage and retrieval
Systems using particular element
Flip-flop
C341S161000
Reexamination Certificate
active
06859387
ABSTRACT:
Three-state binary adders are disclosed for use in pipelined analog-to-digital converters. According to one advantageous embodiment, a three-state binary adder is provided for use in a digital signal processing system. The three-state binary adder is operable to generate binary codes consisting of three states, namely, “00”, “01” and “10.”
REFERENCES:
patent: 5638071 (1997-06-01), Capofreddi et al.
patent: 5710563 (1998-01-01), Vu et al.
patent: 5982314 (1999-11-01), Amar et al.
patent: 6124820 (2000-09-01), Norman
patent: 6222477 (2001-04-01), Irie et al.
Aude Arlo J.
Lewicki Laurence D.
National Semiconductor Corporation
Phan Trong
LandOfFree
Three-state binary adders and methods of operating the same does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Three-state binary adders and methods of operating the same, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Three-state binary adders and methods of operating the same will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3513635