Three-state binary adders and methods of operating the same

Static information storage and retrieval – Systems using particular element – Flip-flop

Reexamination Certificate

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C341S161000

Reexamination Certificate

active

06859387

ABSTRACT:
Three-state binary adders are disclosed for use in pipelined analog-to-digital converters. According to one advantageous embodiment, a three-state binary adder is provided for use in a digital signal processing system. The three-state binary adder is operable to generate binary codes consisting of three states, namely, “00”, “01” and “10.”

REFERENCES:
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patent: 5710563 (1998-01-01), Vu et al.
patent: 5982314 (1999-11-01), Amar et al.
patent: 6124820 (2000-09-01), Norman
patent: 6222477 (2001-04-01), Irie et al.

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