Three-level nonvolatile semiconductor memory device and...

Details Three-level nonvolatile semiconductor memory device and... Three-level nonvolatile semiconductor memory device and...

2006-11-13

2008-08-12

Phung, Anh (Department: 2824)

Static information storage and retrieval

Floating gate

Multiple values

C365S185120

Reexamination Certificate

active

07411820

ABSTRACT:
A nonvolatile semiconductor memory device comprises a memory array of 3-level nonvolatile memory cells. The memory array comprises first even and odd strings of memory cells connected to respective first even and odd bit lines and second even and odd strings of memory cells connected to respective second even and odd bit lines. The first even and odd bit lines are selectively connected to a first common bit line during data programming and read operations, and the second even and odd bit lines are selectively connected to a second common bit line during data programming and read operations. The device programs and reads data in a pair of memory cells using three bits of data corresponding to three threshold voltage distributions of the 3-level nonvolatile memory cells.

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patent: 7173859 (2007-02-01), Hemink
patent: 7187584 (2007-03-01), Chang
patent: 7336538 (2008-02-01), Crippa et al.
patent: 1020040090486 (2004-10-01), None

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