Three-dimensional SRAM trench structure and fabrication method t

Details Three-dimensional SRAM trench structure and fabrication method t Three-dimensional SRAM trench structure and fabrication method t

1995-02-08

1997-09-23

Saadat, Mahshid D.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Junction field effect transistor

257330, 257331, 257334, 257368, 257377, 257664, 257773, 257903, H01L 23485, H01L 23528, H01L 2941

Patent

active

056708033

ABSTRACT:
A three-dimensional five transistor SRAM trench structure and fabrication method therefor are set forth. The SRAM trench structure includes four field-effect transistors ("FETs") buried within a single trench. Specifically, two FETs are located at each of two sidewalls of the trench with one FET being disposed above the other FET at each sidewall. Coaxial wiring electrically cross-couples the FETs within the trench such that a pair of cross-coupled inverters comprising the storage flip-flop for the SRAM cell is formed. A fifth, I/O transistor is disposed at the top of the trench structure, and facilitates access to the flip-flop. Specific details of the SRAM trench structure, and fabrication methods therefor are also set forth.

REFERENCES:
patent: 4364074 (1982-12-01), Garnache et al.
patent: 4653025 (1987-03-01), Minato et al.
patent: 4740826 (1988-04-01), Chatterjee
patent: 4794561 (1988-12-01), Hsu
patent: 4821235 (1989-04-01), Heald
patent: 4890144 (1989-12-01), Teng et al.
patent: 4920397 (1990-04-01), Ishijima
patent: 4929988 (1990-05-01), Yoshikawa
patent: 4987090 (1991-01-01), Hsu et al.
patent: 4997783 (1991-03-01), Hsu
patent: 5001539 (1991-03-01), Inoue et al.
patent: 5016070 (1991-05-01), Sundaresan
patent: 5055898 (1991-10-01), Beilstein, Jr. et al.
patent: 5089862 (1992-02-01), Warner, Jr. et al.
patent: 5096849 (1992-03-01), Beilstein, Jr. et al.
patent: 5122846 (1992-06-01), Haken
patent: 5122848 (1992-06-01), Lee et al.
patent: 5285093 (1994-02-01), Lage et al.
patent: 5293053 (1994-03-01), Malhi et al.
patent: 5324973 (1994-06-01), Sivan
patent: 5376814 (1994-12-01), Lee
patent: 5442214 (1995-08-01), Yang
IBM Technical Disclosure Bulletin vol. 33, No. 1B, Beilstein, Jr. et al., "Three-Dimensional, Six-Device, CMOS SRAM Cell Structure," Jun. 1990, pp.352-354.
IBM Technical Disclosure Bulletin vol. 33, No. 9, Hwang & Rajeevakumar, "Dense SRAM Cell Structure For 16 Mb SRAM Chip And Beyond," Feb. 1991, pp. 276-278.
IBM Technical Disclosure Bulletin vol. 34, No. 2, Gambino et al., "High Density SRAM Structure With A New Three-Dimensional, High-Performance, High-Packing Density, Planar Inverter Design," Jul. 1991, pp. 255-258.
IBM Technical Disclosure Bulletin vol. 34, No. 6, Chang, "High-Density CMOS SRAM Cell," Nov. 1991, pp. 95-97.

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