Three-dimensional multichip package

Details Three-dimensional multichip package Three-dimensional multichip package

1994-12-29

1996-01-02

Mintel, William

Active solid-state devices (e.g., transistors, solid-state diode

Physical configuration of semiconductor

With electrical contact in hole in semiconductor

257686, 257730, 257777, H01L 2940

Patent

active

054811333

ABSTRACT:
A multichip array package for IC devices with a master semiconductor device supporting and electrically interconnected with a stacked array of subordinate devices. The interconnection structure has a peripheral row of contact pads on the master device. The subordinate devices each have a peripheral row of contact pads that corresponds to the peripheral row on the master device. Openings are provided through the contact pads on the subordinate devices that are in registry. The holes are filled with metal which interconnects the subordinate devices with the master device.

REFERENCES:
patent: 4801992 (1989-01-01), Golubic
patent: 4807021 (1989-02-01), Okumura
patent: 5191405 (1993-03-01), Tomita et al.
patent: 5202754 (1993-04-01), Bertin et al.

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