Three-dimensional memory device with multi-plane architecture

Details Three-dimensional memory device with multi-plane architecture Three-dimensional memory device with multi-plane architecture

2011-05-10

2011-05-10

Ho, Hoai V (Department: 2827)

Static information storage and retrieval

Floating gate

Particular connection

C365S185170, C365S185250, C365S051000, C365S218000, C365S230030

Reexamination Certificate

active

07940564

ABSTRACT:
Disclosed is a 3D memory device including a first plane having a first mat formed on a first layer and a third mat formed on a second layer disposed over the first layer, the first and third mats sharing a bit line, and a second plane having a second mat formed on the first layer and a fourth mat formed on the second layer. The second and fourth mats share a bit line. Each one of the first through fourth mats includes a plurality of blocks and a block associated with the first plane is simultaneously accessed with a block of the second plane.

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