Three-dimensional memory device and programming method

Details Three-dimensional memory device and programming method Three-dimensional memory device and programming method

2011-04-12

2011-04-12

Hoang, Huan (Department: 2827)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185020, C365S185170, C365S185190

Reexamination Certificate

active

07924629

ABSTRACT:
A programming method and a three-dimensional memory device are disclosed. The three-dimensional memory device includes a stacked plurality of layers, each layer having a memory array, and each memory array having a string of memory cells. The programming method includes, for each unselected string associated with an unselected layer in the plurality of layers, charging the channel of memory cells associated with unselected string with a shut-off voltage, and thereafter programming a selected string associated with a selected layer in the plurality of layers.

REFERENCES:
patent: 7023739 (2006-04-01), Chen et al.
patent: 7233522 (2007-06-01), Chen et al.
patent: 2005/0122780 (2005-06-01), Chen et al.
patent: 2007/0008776 (2007-01-01), Scheuerlein
patent: 1020070003818 (2007-01-01), None

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