Three-dimensional ferroelectric integrated circuit without insul

Details Three-dimensional ferroelectric integrated circuit without insul Three-dimensional ferroelectric integrated circuit without insul

1992-09-30

1994-12-20

LaRoche, Eugene R.

Static information storage and retrieval

Systems using particular element

Ferroelectric

G11C 1122

Patent

active

053750853

ABSTRACT:
A ferroelectric integrated circuit is provided in which a first layer of conducting lines (14) is formed over an insulating base layer (10). A first ferroelectric layer (16) is formed overlying the first layer of conducting lines (14). A second layer of conducting lines (18) is formed overlying the first ferroelectric layer (16) with each of the conducting lines of the second layer of conducting lines (18) being substantially perpendicular to the conducting lines of the first layer of conducting lines (14). Potentials placed on selected conducting lines in the first and second layers of conducting lines (14 and 18) polarize areas of the first ferroelectric layer (16) between intersections of the selected conducting lines. Multiple layers may be stacked to form a three-dimensional ferroelectric integrated circuit.

REFERENCES:
patent: 4101975 (1978-07-01), Brody
patent: 4149302 (1979-04-01), Cook
patent: 4707897 (1987-11-01), Rohrer et al.
patent: 4873455 (1989-10-01), De Chambost et al.
patent: 4972370 (1990-11-01), Morimoto et al.
patent: 5031144 (1991-07-01), Persky
patent: 5206788 (1993-04-01), Larson et al.
patent: 5214300 (1993-05-01), Rohrer et al.

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