Thread migration to improve power efficiency in a parallel...

Electrical computers and digital processing systems: support – Computer power control – Power conservation

Reexamination Certificate

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C713S323000, C713S375000

Reexamination Certificate

active

07930574

ABSTRACT:
A method and system to selectively move one or more of a plurality threads which are executing in parallel by a plurality of processing cores. In one embodiment, a thread may be moved from executing in one of the plurality of processing cores to executing in another of the plurality of processing cores, the moving based on a performance characteristic associated with the plurality of threads. In another embodiment of the invention, a power state of the plurality of processing cores may be changed to improve a power efficiency associated with the executing of the multiple threads.

REFERENCES:
patent: 4611289 (1986-09-01), Coppola
patent: 5287508 (1994-02-01), Hejna et al.
patent: 5515538 (1996-05-01), Kleiman
patent: 6230313 (2001-05-01), Callahan et al.
patent: 6651163 (2003-11-01), Kranich et al.
patent: 6681384 (2004-01-01), Bates et al.
patent: 7039794 (2006-05-01), Rodgers et al.
patent: 7069189 (2006-06-01), Rotem
patent: 7082604 (2006-07-01), Schneiderman
patent: 7318164 (2008-01-01), Rawson, III
patent: 7424630 (2008-09-01), Horvath
patent: 2005/0050307 (2005-03-01), Reinhardt et al.
patent: 2006/0117202 (2006-06-01), Magklis et al.
patent: 2008/0310099 (2008-12-01), Monferrer et al.
patent: 2009/0007120 (2009-01-01), Fenger et al.
patent: 2009/0077329 (2009-03-01), Wood et al.
patent: 2009/0089782 (2009-04-01), Johnson et al.
patent: 2009/0094438 (2009-04-01), Chakraborty et al.
patent: 2009/0150893 (2009-06-01), Johnson et al.
Computation Spreading: Employing Hardware Migration to Specialize CMP Cores On-the-fly by Chakraborty et al Oct. 2006 pp. 1-10.
Cai, Qiong , et al., “U.S. Appl. No. 11/714,938, filed Mar. 7, 2007 Meeting Point Thread Characterization”, Whole Document.
Li, Jain , et al., “The Thrifty Barrier: Energy-Aware Synchronization in Shared-Memory Multiprocessors”,Appears in Intl. Symp. on High-Performance Computer Architecture(HPCA), Madrid, Spain, Feb. 2004, Whole Document.
Liu, Chun , et al., “Exploiting Barriers to Optimize Power Consumption of CMP's”, Dept. of Computer Science and Eng., The Pennsylvania State University, University Park, PA 16802., Whole Document.

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