Thread circuits and a broadcast channel in programmable logic

Details Thread circuits and a broadcast channel in programmable logic Thread circuits and a broadcast channel in programmable logic

2005-02-25

2010-10-26

Sough, Hyung S (Department: 2194)

Electrical computers and digital processing systems: interprogra

Interprogram communication using message

C716S030000

Reexamination Certificate

active

07823162

ABSTRACT:
Embodiments of a message processing circuit are disclosed. In one embodiment, a high-level language is used to specify a broadcast channel and first and second thread circuits. The first thread circuit outputs messages to the broadcast channel, each message having units of data, and starts the second thread circuit, indicating position in a message at which the second thread circuit is to commence reading data. The broadcast channel receives messages from the first thread circuit and outputs data of each message along with a position code indicating position in the message of current output data. The second thread reads data from the broadcast channel at a specified position in a message. The high-level language specification is translated into a hardware description language (HDL) specification, and the HDL specification is used to generate configuration data for programmable logic. Programmable logic is configured to implement the thread circuits and broadcast channel.

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