Semiconductor device manufacturing: process – Making device array and selectively interconnecting – Using structure alterable to nonconductive state
Reexamination Certificate
2002-11-27
2004-05-11
Fourson, George (Department: 2823)
Semiconductor device manufacturing: process
Making device array and selectively interconnecting
Using structure alterable to nonconductive state
C438S215000, C438S281000, C438S601000, C438S661000, C438S662000
Reexamination Certificate
active
06734047
ABSTRACT:
BACKGROUND OF INVENTION
1. Technical Field
The present invention relates generally to integrated circuits having fuse elements. More particularly, the present invention relates to a method of forming a fuse structure, and to a laser fuse deletion process.
2. Related Art
Laser fusing processes are typically used to delete specific fuses formed within integrated circuits. For example, laser-blown fuses are commonly used to repair defective regions on a chip. In such processes, one approach is to fabricate the fuse in the final metal layer of a multi-layer metallization structure, with one or more overlying layers of passivating material, such as silicon oxide or silicon nitride. Thereover, a final passivating layer, usually including polyimide, is formed, and an opening is made in the final passivating layer above the fuse. During the deletion process, the fuse is exposed to a laser pulse, which heats the metal fuse above its boiling point. The subsequent volume expansion cracks the passivating material over the fuse, so that it is substantially removed allowing the metal fuse to evaporate.
In forming a multilayer metallization structure, relatively new materials are starting to be used as one or more of the dielectric layers. These materials are low-k, i.e. with dielectric constants less than about 3.5, and are generally organic as well as porous, having much lower thermal and mechanical stability as compared to conventionally used materials, such as undoped and doped silicon oxide. Because of these characteristics, these materials are not generally satisfactory as the dielectric for the final metal layer in which the fuse is fabricated, as damage to adjacent structures can result during the laser fuse deletion process. Consequently, it is generally preferable to use conventional dielectric materials for the final metal layer. Even so, damage can still occur to underlying low-k dielectric layers, due to their low thermal and mechanical stability. Therefore, in those structures in which such low-k dielectric materials are employed, the energy used in the laser fuse deletion process must be greatly reduced from that typically used for integrated circuits containing only conventional dielectric materials.
On the other hand, with a lower energy process, there is an increased risk of residual passivating material remaining over the fuse, i.e. the energy is insufficient to satisfactorily remove the passivating material. Accordingly, in such a process, the passivating material over the fuse should be as thin as possible, although thick enough to ensure that there is no oxidation or contamination of unblown fuses due to exposure to the ambient.
Also impacting the thickness of the passivating material over the fuse is the process of forming a controlled, collapse chip connection (C4) structure. A typical C4 process includes sputter cleaning and TiW etch steps tht will also reduce the thickness of the passivating material over the fuse, which can be on the order of about 100 nm, further hampering from attaining satisfactory thickness.
Therefore, there exists a need in the industry for an improved method of forming a fuse, and performing a laser deletion process, which includes effective integration with forming a C4 metallurgy structure.
SUMMARY OF INVENTION
It is against this background that the present invention provides a method of forming a fuse structure, according to which the passivating material over the fuse has a substantially uniform thickness, that is provided after forming a C4 metallurgy structure. The method is particularly suitable for multilevel-metallization structures which include low-k dielectric materials.
In accordance with the invention, there is provided a method of forming a fuse structure, comprising: providing a substrate which comprises a C4 metallurgy contact pad and a fuse therein; forming an etch resistant layer over the C4 metallurgy contact pad and the fuse; forming at least one passivating layer over the etch resistant layer; removing at least a first portion of the at least one pasivating layer and the etch resistant layer to expose the C4 metallurgy contact pad; forming a C4 metallurgy structure on the C4 metallurgy contact pad; and thereafter removing at least a second portion of the at least one passivating layer to expose the etch resistant layer over the fuse.
Further, in accordance with the invention, there is provided a method of performing a fuse deletion process, comprising: providing a substrate which comprises a C4 metallurgy contact pad and a fuse therein; forming an etch resistant layer over the C4 metallurgy contact pad and the fuse; forming at least one passivating layer over the etch resistant layer; removing at least a first portion of the at least one passivating layer and the etch resistant layer to expose the C4 metallurgy contact pad; forming a C4 metallurgy structure on the C4 metallurgy contact pad; thereafter removing at least a second portion of the at least one passivating layer to expose the etch resistant layer over the fuse; and applying a radiant energy source to the fuse until the etch resistant layer over the fuse is substantially removed.
The foregoing and other features and advantages of the invention will be apparent from the following more particular description of embodiments of the invention.
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Daubenspeck Timothy H.
Gambino Jeffrey P.
Motsiff William T.
Estrada Michelle
Fourson George
Sabo William D.
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