Thin, thermally enhanced flip chip in a leaded molded package

Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame – With structure for mounting semiconductor chip to lead frame

Reexamination Certificate

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Details

C257S666000, C257S673000, C257S707000, C257S787000, C257S784000

Reexamination Certificate

active

06891256

ABSTRACT:
Embodiments of the invention are directed to semiconductor die packages. One embodiment of the invention is directed to a semiconductor die package including, (a) a semiconductor die including a first surface and a second surface, (b) a source lead structure including protruding region having a major surface, the source lead structure being coupled to the first surface, (c) a gate lead structure being coupled to the first surface, and (d) a molding material around the source lead structure and the semiconductor die, where the molding material exposes the second surface of the semiconductor die and the major surface of the source lead structure.

REFERENCES:
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patent: WO 0115216 (2001-03-01), None
“Package Information,” Aug. 1998, pp. 1-5, Vishay Siliconix, Santa Clara, CA.
“Tape and Reel Information,” Aug. 1998, pp. 1-7, Vishay Siliconix, Santa Clara, CA.

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