Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings
Reexamination Certificate
2002-11-05
2004-09-28
Le, Dung A. (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Multiple housings
C257S637000, C257S638000
Reexamination Certificate
active
06798057
ABSTRACT:
TECHNICAL FIELD
The present invention relates, generally, to semiconductor device packaging and, more particularly, to the fabrication of advanced stacked-die semiconductor packages, manufacturability, and the like. In this regard, a major trend in semiconductor packaging is toward low-profile, high-density device packages such as chip-scale and stacked-die packages.
BACKGROUND OF THE INVENTION
Recent advances in semiconductor fabrication techniques have dramatically increased the density and speed of semiconductor devices, leading to a concomitant effort in the field of semiconductor packaging, where increased device density gives rise to many challenges related to electrical connectivity, heat-transfer, manufacturability, and the like. In this regard, a major trend in semiconductor packaging is toward low-profile, high-density device packages such as chip-scale and stacked-die packages.
A typical stacked-die package includes two or more semiconductor devices configured in a stack—one on top of the other—with bond wires leading from bond pads on the first device to bond pads on the second. The bottom-most die in the stack is typically bonded to a suitable substrate, for example, a ball grid array (BGA) or fine ball grid array (FBGA) substrate, and bond wires are provided between bond-pads on the package substrate to one or more of the die in the stack. The BGA substrate typically includes an array of solder balls which provide, electrical connectivity to external devices. In this way, a relatively dense, low-profile semiconductor package can be manufactured.
Currently-known stacked-die packages are unsatisfactory in a number of respects, however. For example, the packages remain inordinately large for many applications such as portable electronics, cellular phones, digital cameras, personal digital assistants (PDAs), global positioning systems, and the like. Moreover, the effort and expense to assemble many conventional stacked BGA packages can be significant, since each layer of the stack is typically assembled and sealed prior to assembly into the stack. New devices and methods are therefore needed to overcome these and other limitations of the prior art. Specifically, there is a need for an improved and highly manufacturable stacked-die package.
SUMMARY OF THE INVENTION
According to various embodiments of the invention, a thin-stacked ball grid array (BGA) package is created by coupling a semi-conducting die to each of the opposing faces of an interposer having bond pads and circuitry on both faces. Solder balls on either side of each die and/or the interposer provide interconnects for stacking packages and also provide interconnects for module mounting. Each die may be electrically coupled to the interposer using wire bonds, “flip-chip” techniques, or other techniques as appropriate. In a further embodiment, a redistribution layer is formed on the outer surface of a bumped die to create connections between the die circuitry, ball pads and/or wire bonding pads. Because the two die are coupled to each other on opposite faces of the interposer, each package is extremely space-efficient. Individual packages may be stacked together prior to encapsulation or molding to further improve the stability and manufacturability of the stacked package.
REFERENCES:
patent: 5744827 (1998-04-01), Jeong et al.
patent: 6137164 (2000-10-01), Yew et al.
patent: 6339254 (2002-01-01), Venkateshwaran et al.
Bolkin Todd O.
Cobbley Chad A.
Le Dung A.
Snell & Wilmer LLP
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