Thin packaging of multi-chip modules with enhanced thermal/power

Details Thin packaging of multi-chip modules with enhanced thermal/power Thin packaging of multi-chip modules with enhanced thermal/power

1996-08-20

1997-07-08

Thompson, Gregory D.

Electricity: electrical systems and devices

Housing or mounting assemblies with diverse electrical...

For electronic systems and devices

257707, 257713, 257738, 257778, 257787, 361717, 361722, 361761, 361744, 361803, H05K 720

Patent

active

056468288

ABSTRACT:
A novel packaging of semiconductor elements, such as MCM tiles, with a variety of printed circuit or wired boards (PWB), the packages occupying a small size, at least in the vertical direction, relative to prior art OMPAC devices. The MCM tile includes an interconnection substrate with peripheral metallizations and at least one chip or integrated circuit (IC) mounted on the substrate by solder reflow or conductive adhesive technology. The PWB which may be a single level or a multilevel, is provided with an aperture for accommodation of at least one chip therein. Depending on the type of interconnection between the substrate and the PWB, the aperture may be larger than the substrate of the MCM tile for wire bonding interconnection or smaller than the substrate for solder reflow or conductive adhesive interconnection. In the wire bonding case, the MCM tile is positioned within the aperture resting on the surface of the PWB or of a structural member or of a heat sink which encloses one end of the aperture. The other end of the aperture may be open or enclosed by a structural member, a heat sink, another PWB or a mother board. For solder reflow or conductive adhesive interconnection, the substrate which is larger than the aperture is positioned so that its ends overlap areas of the PWB adjacent the aperture and the chips and/or substrate are positioned within the aperture. The interconnections are enclosed in a compliable encapsulating material, such as silica gel.

REFERENCES:
patent: 4539622 (1985-09-01), Akasaki
patent: 4630172 (1986-12-01), Stenerson et al.
patent: 5001548 (1991-03-01), Iversen
patent: 5008734 (1991-04-01), Dutta et al.
patent: 5012386 (1991-04-01), McShane et al.
patent: 5043796 (1991-08-01), Tai et al.
patent: 5109317 (1992-04-01), Miyamoto et al.
patent: 5276586 (1994-01-01), Hatsuda et al.
patent: 5323292 (1994-06-01), Brzezinski
patent: 5346118 (1994-09-01), Degani et al.
patent: 5355283 (1994-10-01), Marrs et al.
patent: 5521435 (1996-05-01), Mizukoshi
patent: 5541450 (1996-07-01), Jones et al.
patent: 5561323 (1996-10-01), Andros et al.
"Overmoled Plastic Array Carriers (OMPAC): A Low Cost, High Interconnect Density IC Packaging Solution for Consumer and Industrial Electronics" by Bruce Freyman and Robert Pennisi, Journal: 41st Electronic Components and Technology Conference, Book B, No. 502920, Atlanta, GA., pp. 176-182.
"A Mixed Solder Grid Array and Peripheral Leaded MCM Package" by Hashemi, H., Olla, M., Cobb, D., and Sandborn, P., Journal: Proc Electron Compon Technol Conf., Orlando, Florida 1993, pp. 951-956.

Affiliated with

Also associated with

Rating

Thin packaging of multi-chip modules with enhanced thermal/power does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Thin packaging of multi-chip modules with enhanced thermal/power, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Thin packaging of multi-chip modules with enhanced thermal/power will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2412240