Fishing – trapping – and vermin destroying
Patent
1988-11-10
1990-09-11
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437 62, 437938, 357 237, 357 52, H01L 21265
Patent
active
049563076
ABSTRACT:
A silicon-over-insulator transistor is provided having a semiconductor mesa (40) overlying a buried oxide (42). Insulating regions (50) are formed at the sides of the semiconductor mesa (40). An oxidizable layer (56) is formed over the mesa's insulating region (46). This oxidizable layer (56) is then anisotropically etched, resulting in oxidizable sidewalls (60). An optional foot (70) may be formed at the bottom edge of the oxidizable sidewalls (76). These oxidizable sidewalls (76) are then oxidized, resulting in a pure oxide sidewall (64). The gate (66) is then formed over the pure oxide sidewalls (64) and a gate oxide (62).
REFERENCES:
patent: 4703554 (1987-11-01), Havemann
patent: 4714685 (1987-12-01), Schubert
Wolf, S. et al., Silicon Processing for the VLSI Era, Lattice Press, Sunset Beach, Calif., 1986, pp. 179-82.
Matloubian Mishel
Pollack Gordon P.
Sundaresan Ravishankar
Comfort James T.
Hearn Brian E.
Holtzman Laura
Sharp Melvin
Sorensen Douglas A.
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