Thin flip—chip method

Details Thin flip—chip method Thin flip—chip method

2000-12-06

2003-01-14

Powell, William A. (Department: 1765)

Semiconductor device manufacturing: process

Chemical etching

Combined with the removal of material by nonchemical means

C216S038000, C216S088000, C438S108000, C438S113000, C438S458000, C438S459000, C438S460000, C438S690000, C438S745000

Reexamination Certificate

active

06506681

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of thinning semiconductor wafers. More specifically, the present invention relates to a method of supporting bumped semiconductor wafers during a wafer thinning process using a mold compound which also acts as an underfill material in flip-chip mounting.
2. State of the Art
In order to increase production rates and to reduce costs for the manufacturing of integrated circuit semiconductor dice, a multitude of semiconductor dice are typically fabricated at one time onto a wafer comprising a semiconducting substrate (e.g., silicon or gallium arsenide) through methods well known in the art. Referring to drawing
FIGS. 1 and 1A
, the wafer
10
includes an active surface
15
where the semiconductor dice
20
reside and a backside
17
. After fabrication, individual semiconductor die
20
, commonly referred to as dice in the plurality or a die
20
in the singular, are typically separated from the wafer by sawing the wafer along boundary or scribe lines (streets) formed between each semiconductor die
20
. Once separated, the semiconductor dice
20
can be packaged in various configurations, including smart-card packages and packages containing more than one semiconductor die
20
, also known as multi-chip modules (MCMs).
The demand for smaller, higher performance semiconductor dice which support portable communications devices, including memory cards, smart cards, cellular telephones, and portable computing and gaming devices, has motivated the development of new techniques for producing smaller and thinner semiconductor dice from thinned wafers.
In addition to thinner profile advantages, there are other important benefits to reducing the thickness of a silicon semiconductor die in terms of enhancements to device performance and reliability. One of the major problems in increasing the speed and power of a chip is the removal of heat, particularly since semiconductor materials are generally poor thermal conductors. Nearly all semiconductor material is theoretically susceptible to thinning, as the performance characteristics of the semiconductor die are basically contained in 2-3 &mgr;m of active circuitry. Thinning a semiconductor die reduces the serial thermal resistance between the active circuitry on the front side or active surface of the semiconductor die and the backside of the semiconductor die, making for faster thermal transfer. Thinner semiconductor die may also aid problems caused by mismatches between coefficients of thermal expansion (CTE) of materials within a packaged semiconductor die. In this regard, thinner semiconductor dice are less prone to bond and silicon fracture because a reduced semiconductor die thickness allows the semiconductor die to flex with the substrate or board to which it is mounted. Thus, the semiconductor die thinning process can dramatically decrease the chances of thermal cycling-induced bond stress as well as reduce the chances of semiconductor die cracking.
A competing trend in current wafer manufacturing is to increase wafer size in order to reduce the costs of manufacturing an individual semiconductor die. At the present, wafers are typically around eight inches (8″) in diameter. Since silicon and gallium arsenide are relatively brittle materials, a minimum thickness of the wafer is required in order to handle a wafer of this size without breaking it. Since wafers having a diameter of approximately twelve inches (12″) are being used in the manufacture of semiconductor dice, thicker silicon wafers are required to withstand wafer handling and manufacturing processes.
With the lowest possible package profile thickness and size as the goal for the semiconductor die, however, the substrate thicknesses required for larger diameter wafers to be able to withstand wafer handling and manufacturing processes may not be suitable for some electronics applications. One way of reducing the thickness of such packages is to use semiconductor dice that are as thin as possible manufactured from wafers which are as thin as possible.
Typically, thin semiconductor dice are produced from thinned wafers, the wafer being thinned while in wafer form using a mechanical surface grinding (backgrinding) process, although chemical or plasma etching methods are sometimes used. Grinding is advantageous in that it can reduce wafer thickness accurately and at a relatively significant rate, making it a very affordable and simple process. Grinding also suffers from several disadvantages, however. Protective measures must be taken to ensure the circuit pattern-formed active surface
15
of the wafer is not stained or injured with grinding trashes, etc. Further, backgrinding can induce significant stress and damage the silicon wafer unless some form of support for the wafer is provided.
Referring to drawing
FIG. 2A
, illustrated is a backgrinding apparatus for thinning a semiconductor wafer
10
. The basic elements of a backgrinding apparatus comprise a holding chuck
51
, which may apply a vacuum force to hold the wafer, and a grinding wheel
52
. In a representative wafer backgrinding process, a semiconductor wafer is placed between the holding chuck
51
and the grinding wheel
52
wherein the exposed surface on the backside
17
of a semiconductor wafer
10
is thinned to a desired thickness by the mechanical action of a grinding wheel. This process may also be extended to involve chemical mechanical polishing (CMP).
Illustrated in drawing
FIG. 2B
is a side view of semiconductor wafer
10
shown schematically wherein a thickness
17
a
of the inactive backside surface
17
of a semiconductor wafer
10
has been ground away.
In processing the semiconductor wafer, a protective member or submount can be previously adhered to the active surface
15
of the semiconductor wafer to protect the circuitry of the semiconductor dice formed on the semiconductor wafer. Protective members known in the art include adhesive tapes (such as UV tape) and a variety of resists, while submounts are typically formed of wax, glass, quartz, sapphire, metal, alumina, gallium arsenide or silicon and are secured to the wafer by an adhesive or bonding material. After backgrinding, a cleaning fluid is generally used to remove wafer debris and cool the semiconductor wafer. The cleaning fluid is subsequently dried, typically through a light source such as a halogen lamp. The protective tape, resist or submount is then removed from the active surface of the semiconductor die formed on the semiconductor wafer.
Although these prior art protective members provide a certain degree of support and possibly some cushioning during the backgrinding of the semiconductor wafer, their use is less than optimal for some applications. Areas of improvement include convenience and cost of use, increased structural support during grinding, ease of removal after the grinding process, and compatibility with other chip and/or fabrication steps. Tapes in particular pose challenges because of their high adhesive strength and the compressive stress they tend to induce on thinned semiconductor wafers.
A variety of methods exist for thinning a semiconductor wafer and for thinning an individual semiconductor die. U.S. Pat. No. 6,030,485 to Yamada relates to a method and apparatus for a wafer grinding process that uses an ultraviolet- (UV) sensitive tape to support the semiconductor wafer and protect circuitry elements during the grinding process. The UV-sensitive tape is manufactured with an adhesive agent that is reactive with ultraviolet rays and heat used in the drying process so as that the adhesive agent becomes less adhesive, thus allowing the tape to be peeled off
U.S. Pat. No. 5,324,687 to Wojnarowski discloses a method of thinning semiconductor dice wherein the semiconductor dice are first adhesively mounted in die carriers made of removable or dissolvable material such as glass, metal, ceramics, etc. The front sides of the semiconductor dice are then adhered to a dielectric layer which, in turn, is overlaid with

Affiliated with

Also associated with

Rating

Thin flip—chip method does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Thin flip—chip method, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Thin flip—chip method will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3032181