Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2002-02-05
2004-02-03
Thompson, Craig A. (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C257S072000
Reexamination Certificate
active
06686229
ABSTRACT:
The invention relates to thin film transistors and in particular to a method of manufacture of a device including a number of thin film transistors.
Thin film transistors (TFTs) are widely used in a number of applications. A particularly important application for thin film transistor technology is in the field of active matrix liquid crystal displays. However, this is not the only application; another example is in the field of X-ray detectors which may include a photodiode array in which each photodiode is connected to a corresponding thin film switching transistor.
A typical TFT on an active plate of an active matrix liquid crystal display is illustrated in
FIG. 6. A
gate
51
extends laterally from a row electrode
53
, a semiconductor region
55
is provided on the gate extension and source
57
and drain
59
metallisations are provided over the semiconductor region, one of the source and drain being connected to a column electrode
61
and the other to a pixel electrode
65
, generally made of transparent indium tin oxide (ITO). The source, gate and drain and the semiconductor region define a thin film transistor
63
.
The current state of the art process for making arrays of thin film transistors, for example for making active matrix liquid crystal displays (AMLCDs), involves depositing material in sheet form and then using photolithography and etching to pattern the material. Typically, five mask steps are used in a TFT design, although some processes have been proposed with four mask steps. The need to deposit material layers, define photoresist on each layer and then etch or develop away typically 95% of each material layer limits the possible cost savings. Moreover, the high performance patterning tools used have high capital cost, limited throughput and use large quantities of costly photoresist and developer.
As an alternative, it has been proposed to directly print resist in the desired pattern, instead of coating, exposing, developing and baking photoresist in the conventional photolithography process. This would save costs by increasing throughput, reducing capital costs and lowering materials costs as compared to a conventional photolithography process. A more radical option proposed is to directly print the material required, or a precursor of that material, thus also eliminating the blanket deposition, resist stripping and etching processes.
Unfortunately, printing processes have poor resolution and alignment accuracy compared with conventional photolithography. Typical printing resolutions are of order 10 &mgr;m and alignment accuracy is of order 10 &mgr;m for offset printing techniques. These compare unfavourably to the resolution of 4 &mgr;m and alignment accuracy of 1.5 &mgr;m achieved using conventional photolithography for AMLCDs. If conventional thin film transistor (TFT) designs on the active plates of conventional AMLCDs are scaled up to printing design rules, then the resulting TFTs would have too high a parasitic capacitance to provide an adequate performance.
A second problem is that printing processes such as gravure-offset printing, and other forms of printing, tend to leave hairs or tails of material from the trailing edge of features. These can lead to short circuits in the TFTs and other faults in AMLCDs. With conventional AMLCD TFT and pixel designs, the TFT is placed in the corner of each pixel, with the gate defined by a protrusion from a row line. If a printing technology such as gravure-offset is used, the hairs could lead to undesirable features such as variable capacitive coupling from the gate to the pixel, leading to display effects such as flicker.
A partial solution to the problems of printing TFTs is proposed by M. Ie Contellec et al, J. Non-Cryst. Solids, Vol 97&98 (1987) pages 297 to 300, “Very Simple a-Si TFT Fabrication Process for LCD-TV Application”. They propose a TFT design and an associated process in which the design is tolerant to misalignment between the two mask layers. However, the process proposed has a number of disadvantages. The column electrodes are made of Indium Tin Oxide (ITO) which has a high resistivity which limits the display size. The two-mask top gated structure proposed results in a high parasitic capacitance loading on the row electrode, which also limits display size. The semiconductor layer is exposed to the light in a transmissive AMLCD, which would lead to unacceptable leakage current unless an additional light shield layer is used.
Instead of the two-mask top-gated structure, it would be preferred to use a bottom gated structure, which has become the industry standard. The basic layout of the design of le Contellec et al could be translated into a bottom gated process with a higher mask count. However, given the coarser resolutions of printing technologies, the resulting TFTs would have too high a parasitic capacitance to provide a good performance in an AMLCD.
A number of other suggestions for fabricating devices using printing for patterning have also been published.
For example, Eiji Kaneko describes in Displays, Volume 14, Number 2, (1993) “A new fabrication technology for very-large-area TFT-LCDs”, an all-printed process for manufacturing active matrix displays. Likewise, Y. Mikami et al also describe, in IEEE Transactions On Electron Devices, vol. 41, no. 3, March 1994, “A New Patterning Process Concept for Large-Area Transistor Circuit Fabrication Without Using an Optical Mask Aligner”, an all-printed TFT LCD.
However, these publications do not disclose a solution to the problems of excessive parasitic capacitance or of the possible short circuits from “tails” of material extending from printed regions.
Accordingly, there remains a need for an improved method of fabricating thin film transistors, and devices including thin film transistors such as AMLCDs.
According to a first aspect of the invention there is provided a method of manufacturing a plate having an array of thin film transistors including the steps of: forming and patterning by a lower definition process a layer defining row conductors extending across a substrate, forming and patterning by a lower definition process semiconductor regions to form the channel regions of thin film transistors, the semiconductor regions being vertically aligned with regions of the row conductors which regions form the gates of the thin film transistors; forming a gate insulation layer between the layer defining row conductors and the semiconductor regions; and depositing and patterning the sources and drains of the thin film transistors using a higher definition process.
The method forms the plate in such a way that only one layer, the layer defining the source and drain, needs to be accurately defined by a high definition (resolution) process. This layer defines the channel length. Other layers can be patterned by a lower definition process, e.g. printing. In this way, the method can manufacture plates more economically.
In embodiments of the invention a number of different processes may be used for the lower definition process and for the higher definition process, depending on the resolution required. As will be appreciated by the skilled person, photolithography is a particularly useful high definition process. Projection photolithography may be used, for high definition. As an alternative, photolithography may be carried out using a proximity aligner; this is sufficient to define a channel length of around 7 &mgr;m with sufficient accuracy.
The process with a lower definition may be a low resolution photolithography process, such as with a proximity aligner, or alternatively a printing process such as gravure-offset printing.
Where printing is used to pattern a layer the printing process may directly print the layer. This avoids material wastage.
The row conductor may have a substantially uniform width across the region of the substrate in which thin film transistors are formed. The semiconductor region may be substantially in the form of rectangles extending with the long axes substantially parallel to the rows. With this relatively simp
Curling Catherine J.
Deane Steven C.
Koninklijke Philips Electronics , N.V.
Thompson Craig A.
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