Thin film transistor with sub-gates and schottky...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having schottky gate

Reexamination Certificate

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C438S300000, C438S581000, C438S583000, C438S630000, C438S631000, C257S280000, C257S377000, C257S454000

Reexamination Certificate

active

06555424

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a thin film transistor and a manufacturing method of the same, and more particularly, to a thin film transistor with sub-gates and Schottky source/drain and a manufacturing method of the same.
2. Description of the Prior Art
FIG. 1
shows the structural diagram of a conventional thin film transistor. In
FIG. 1
,
10
represents a glass or quartz substrate;
12
denotes a semiconductor layer, eg. polysilicon;
14
represents a doping area on the semiconductor
12
, which serves as source/drain of the thin film transistor
1
; and
16
represents gate oxide layer; and
18
represents gate.
The shortcomings of the conventional thin film transistor
1
are:
Because implant doping and the following annealing must be carried out, it is not advantageous to lower the process temperature.
Depending on the type of dopant in the source/drain, the operation mode of a thin film transistor is restricted as n type or p type, which does not allow for bi-channel operation.
Please refer to the curve a in
FIG. 2.
, which illustrates the characteristic of drain current (I
D
) vs gate voltage (V
G
) of a conventional thin film NMOS transistor. From
FIG. 2
, it is observed that when the gate voltage is negative, there is still drain current leakage generated. This is caused by the off-stage leakage resulted from the strong field induced between the drain and gate when negative gate voltage is applied and grain boundary traps in the semiconductor
12
.
SUMMARY OF THE INVENTION
The object of the present invention is to provide a novel manufacturing method for a thin film transistor with sub-gates and Schottky source/drain, which omits the steps of distribution doping in source/drain, and follow-up annealing to lower complexity and production costs. This is beneficial to lower the process temperature.
Another object of the present invention is to provide a novel thin film transistor with a sub-gate and Schottky source/drain, which allows for a transistor element to operate in both n type and p type channels by simply adjusting the biased-voltage of the sub-gate.
Another object of the present invention is to apply voltage to the sub-gate to induce the formation of an electrical junction, which takes place the conventional source/drain extension; which results in the reduction of cut-off leakage.
To achieve the above-mentioned objects, the invention discloses a first manufacturing method for forming a thin film transistor with sub-gates and Schottky source/drain, comprising the steps of:
(a)providing an insulation substrate; (b)forming two island-shaped sub-gate layers on the insulation substrate; (c)forming a first insulation layer on the island-shaped sub-gate layers and the insulation substrate; (d)forming a second insulation layer on the first insulation layer; (e)planarizing the second insulation layer to expose the first insulation layer; (f)forming an island-shaped semiconductor layer on the first and second insulation layers; (g)forming a gate dielectric layer on the surface of the island-shaped semiconductor layer; (h)forming an island-shaped main gate layer on the gate dielectric layer; (I)forming insulation spacers on the side walls of the island-shaped main gate layer and exposing the island-shaped semiconductor layer on two sides of the insulation side walls; (j)forming a metal-containing replacement layer on the island-shaped semiconductor layer of two sides of the insulation side walls; wherein the replacement layer and the island-shaped semiconductor layer existing underneath the insulation spacers form a Schottky contact, which serves as the Schottky source/drain in the thin film transistor.
To achieve the above-mentioned objects, the invention discloses a second manufacturing method for forming a thin film transistor with sub-gates and a Schottky source/drain, comprising the steps-of:
(a)providing an insulation substrate; (b)forming two island-shaped sub-gate layers on top of the insulation substrate;(c)forming a first insulation layer on the island-shaped sub-gate layer and the insulation substrate; (d)forming a second insulation layer on the first insulation layer; (e)planarizing the second insulation layer to expose the first insulation layer; (f)forming an island-shaped semiconductor layer on the first and second insulation layers; (g)forming a gate dielectric layer on the surface of the island-shaped semiconductor layer; (h)forming an island-shaped main gate layer on the gate dielectric layer; (I)forming an island-shaped mask layer to cover the island-shaped main gate layer and the gate dielectric layer located at two sides of the island-shaped main gate layer; (j)removing the gate dielectric layer on two sides of the island-shaped mask layer to expose the island-shaped semiconductor layer; (k)forming a metal-containing replacement layer on the exposed island-shaped semiconductor layer on two sides of the island-shaped mask layer; wherein the replacement layer and the island-shaped semiconductor layer existing underneath the island-shaped mask layer form a Schottky contact, which serves as the Schottky source/drain in the thin film transistor; (
1
) removing the island-shaped mask layer.
To achieve the above-mentioned objects, the invention discloses a third manufacturing method for forming a thin film transistor with sub-gates and Schottky source/drain, comprising the steps of:
(a)providing an insulation substrate; (b)forming an island-shaped semiconductor layer on top of the insulation substrate; (c)forming a first insulation layer, a first conductive layer and a second insulation layer on the island-shaped semiconductor layer and the insulation substrate sequentially; (d)defining and etching the second insulation layer and the first conductive layer to form two sub-gate stack layers on the first insulation layer and the island-shaped semiconductor layer; (e)forming insulation spacers on the side walls of the two sub-gate stack layers; (f)removing the first insulation layer to expose the island-shaped semiconductor layer; (g)forming a gate dielectric layer on the island-shaped semiconductor layer; (h)defining and forming a main gate layer on the gate dielectric layer between the two sub-gate stack layers; (i)removing the gate dielectric layer which is not covered by the main gate layer and the two sub-gate stack layers to expose the island-shaped semiconductor layer; (j)forming a metal-containing replacement layer on the exposed island-shaped semiconductor layer; wherein the replacement layer and the island-shaped semiconductor layer existing underneath the island-shaped insulation spacers form a Schottky contact, which serves as the Schottky source/drain in the thin film transistor.
To achieve the above-mentioned objects, the invention discloses a fourth manufacturing method for forming a thin film transistor with sub-gates and Schottky source/drain, comprising the steps of:
(a)providing an insulation substrate; (b)forming two island-shaped semiconductor layers on the insulation substrate; (c)forming a gate dielectric layer on the surface of the island-shaped semiconductor layer; (d)forming an island-shaped main gate layer on the gate dielectric layer; (e)forming insulation spacers on the side walls of the island-shaped main gate layer; (f)removing the gate dielectric layer on the two sides of the insulation spacers to expose the island-shaped semiconductor layer; (g)forming a metal-containing replacement layer on the exposed island-shaped semiconductor layer; wherein the replacement layer and the island-shaped semiconductor layer existing underneath the insulation side walls form a Schottky contact, which serves as the Schottky source/drain in the thin film transistor; (h)removing the metal layer which has not reacted to form the replacement layer; (I) forming an insulation layer to cover the main gate layer, insulation spacer, and the Schottky source/drain; (j) planarizing the insulation layer; and (k)forming an island-shaped sub-gate layer on the top of the main gate layer, the two end

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