Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
1998-01-08
2002-06-18
Pham, Long (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S030000, C257S059000, C257S072000, C349S149000, C349S150000, C349S151000, C349S152000
Reexamination Certificate
active
06406946
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a thin film transistor matrix device and a method for fabricating the same, more specifically a TFT-LCD (TFT matrix-type liquid crystal display device) for use in laptop personal computers and wall TVs, and a method for fabricating the same.
TFT-LCDs have characteristics of thinness and lightness, low electric power consumption, etc. and are expected to have a large market in the future as a display device which will take place of CRTs. To realize TFT panels of high precision, large screens for use in work stations, etc., the aperture ratio is a significant problem for higher image quality. To fabricate inexpensive TFT panels, it is important that the TFT panels have device structures which can be fabricated by the use of photolithography techniques.
A pattern layout of a conventional thin film transistor matrix device is shown in FIG.
35
.
An image display region
112
is disposed at the center of a transparent insulating substrate
110
, and a plurality of thin film transistors (not shown) and a plurality of picture element electrodes (not shown) connected to the sources of the respective thin film transistors are arranged in a matrix in the region. The gate electrodes of the thin film transistors are commonly connected to gate bus lines
114
a
and
114
b
arranged widthwise as viewed in
FIG. 35
, and the drain electrodes thereof are commonly connected to drain bus lines
116
a
and
116
b
arranged lengthwise as viewed in FIG.
35
.
The plural gate bus lines
114
a
and
114
b
are separated in odd number-th gate bus lines
114
a
which are adjacent to each other, and even number-th gate bus lines
114
b
(in this specification, the term “odd number-th lines” is used to refer to the odd numbered lines, namely the first, third, fifth, . . . lines; the term “even number-th lines” is used to refer to the even numbered lines, namely the second, fourth, sixth, . . . lines ). The odd number-th gate bus lines
114
a
are connected to gate side tab terminals
118
a
on the right side as viewed in
FIG. 35
, and the even number-th gate bus lines
114
b
are connected to gate side tab terminals
118
b
on the left side as viewed in FIG.
35
.
The plural drain bus lines
116
are separated in odd number-th drain bus lines
116
a
which are adjacent to each other, and even number-th drain bus lines
116
b
. The odd number-th drain bus lines
116
a
are connected to drain side tab terminals
120
a
on the upper side as viewed in
FIG. 35
, and the even number-th drain bus lines
116
b
are connected to drain side tab terminals
120
b
on the lower side as viewed in FIG.
35
.
In the thus-structured thin film transistor matrix device, as described above, the gate bus lines
114
a
,
114
b
, and the drain bus lines
116
a
,
116
b
are respectively formed by independent conducting layer patterns. As a result problems due to electric stresses, such as electrostatic charges, etc., occur in the process for fabricating the thin film transistor and in the process for fabricating the liquid crystal panel, whereby the conducting layer patterns are short-circuited and the characteristics of the thin film transistors, such as threshold values, etc., are changed.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a thin film transistor matrix device and a method for fabricating the same, which is free from occurrence of short-circuit and characteristic changes due to stresses, such as electrostatic charges, etc. and which can be fabricated with high yields.
Another object of the present invention is to provide a thin film transistor matrix device and a method for fabricating the same, which can be inspected with high precision, so that possible defective products can be rejected beforehand.
The above-described objects are achieved by a thin film transistor matrix device comprising: transparent insulating substrate; a plurality of thin film transistors arranged on the transparent insulating substrate in a matrix; a plurality of picture element electrodes arranged on the transparent insulating substrate in a matrix and connected to the sources of the thin film transistors; a plurality of bus lines for commonly connecting the gates or the drains of the thin film transistors; outside terminals formed on a margin of the transparent insulating substrate and opposed to the ends of the bus lines; and connection lines formed in regions inner of the outside terminals and commonly connecting said plurality of bus lines, whereby even when electric stresses due to electrostatic charges are applied in the process for fabricating the thin film transistor matrix device, the device can be fabricated without short-circuit defects and with little characteristic change and high yields.
In the above-described thin film transistor matrix device it is preferable that the connection lines include a plurality of connection lines, said plurality of gate bus lines which are adjacent to each other being respectively commonly connected to said plurality of connection lines, whereby inspection of high precision is possible by applying different voltages to the connection lines, so that defective products can be expelled beforehand.
It is preferable that the above-described thin film transistor matrix device further comprises resistant lines which interconnect said plurality of connection lines and have a higher resistant value than the connection lines.
The above-described objects are achieved by a transparent insulating substrate; a plurality of thin film transistors arranged on the transparent insulating substrate in a matrix; a plurality of picture element electrodes arranged on the transparent insulating substrate in a matrix and connected to the sources of the thin film transistors; a plurality of gate bus lines for commonly connecting the gates of the thin film transistors; a plurality of drain bus lines for commonly connecting the drains of the thin film transistors; first outside terminals formed on a margin of the transparent insulating substrate and opposed to the ends of the gate bus lines; second outside terminals formed on a margin of the transparent insulating substrate and opposed to the ends of the drain bus lines; and gate connection lines formed in an inner region of the second outside terminals and commonly connecting said plurality of drain bus lines, whereby even when electric stresses due to electrostatic charges are applied in the process for fabricating the thin film transistor matrix device, the device can be fabricated without short-circuit defects and with little characteristic change and high yields.
In the above-described thin film transistor matrix device it is preferable that the thin film transistor matrix device further comprises resistant lines for interconnecting the gate connection lines and the drain connection lines, and having a higher resistant value than the gate connection lines and the drain connection lines.
In the above-described thin film transistor matrix device it is preferable that a first gate connection line and a second gate connection line respectively commonly connect said plurality of gate bus lines which are adjacent to each other, and a first drain connection line and a second drain connection line respectively commonly connect said a plurality of gate drain lines which are adjacent to each other.
In the above-described thin film transistor matrix device it is preferable that the thin film transistor matrix device further comprises resistant lines for interconnecting the first and the second gate connection lines, and the first and the second drain connection lines and having a resistant value than said plurality of connection lines, whereby inspection of high precision is possible by applying different voltages to the connection lines, so that defective products can be rejected beforehand
The above-described objects are achieved by the method for fabricating a thin film transistor matrix device comprising: a first step of forming on a transparent insulating substrate a plurality of ga
Hayashi Shougo
Kinjo Takeshi
Okamoto Kenji
Tachibanaki Makoto
Takizawa Hidaki
Brairton Scott
Fujitsu Limited
Greer Burns & Crain Ltd.
Pham Long
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