Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
1999-04-12
2001-12-18
Nguyen, Chanh (Department: 2675)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S089000, C345S098000, C345S099000
Reexamination Certificate
active
06331847
ABSTRACT:
RELATED APPLICATION
This application is related to Korean Application No. 98-13127, filed Apr. 13, 1998, the disclosure of which is hereby incorporated herein by reference.
FIELD OF THE INVENTION
The present invention relates to integrated circuit display devices, and more particularly to thin-film transistor (TFT) liquid crystal display (LCD) devices and methods of operating same.
BACKGROUND OF THE INVENTION
Thin-film transistor (TFT) liquid crystal display (LCD) devices typically include a display panel
11
, a gate line driver circuit
12
and a data line driver circuit
10
, as illustrated by FIG.
1
. The display panel
11
typically comprises a two-dimensional array of display cells having TFT access transistors T
1
therein which can be turned on when display data is being loaded from a respective data line DL
16
to a liquid crystal capacitor C
1
within a selected cell. As illustrated, each liquid crystal capacitor C
1
may be electrically connected in series between a drain/pixel electrode of a respective access transistor T
1
and a common potential Vc. As will be understood by those skilled in the art, a row of access transistors can be turned on simultaneously during a selection time interval by driving a respective gate line
14
to a logic 1 potential. These and other aspects of TFT-LCD devices are more fully described in U.S. application Ser. No. 08/786,474, now U.S. Pat. No. 5,923,310, entitled “Liquid Crystal Display Devices With Increased Viewing Angle Capability and Methods of Operating Same”, assigned to the present assignee, the disclosure of which is hereby incorporated herein by reference. Additional aspects of TFT-LCD devices are also disclosed in U.S. Pat. Nos. 5,793,346 entitled “Liquid Crystal Display Devices Having Active Screen Clearing Circuits Therein, U.S. Pat. No. 5,808,706, entitled “Thin-Film Transistor Liquid Crystal Display Devices Having Cross-Coupled Storage Capacitors”, and U.S. Pat. No. 5,815,129, entitled “Liquid Crystal Display Devices Having Redundant Gate Line Driver Circuits Therein Which Can be Selectively Disabled”, assigned to the present assignee, the disclosure of which is hereby incorporated herein by reference.
As will be understood by those skilled in the art, AC driving methods are typically used in TFT-LCD devices to inhibit display panel deterioration. Such AC driving methods include line inversion and dot inversion methods. Both of these methods require the use of data line driver circuits
10
which are capable of generating positive and negative polarity gray level voltages. The use of data line driver circuits which can generate gray level voltages having relatively small offset margins is advantageous because there is an inverse relationship between the magnitude of the offset margins and the number of shades of gray or color a display can generate.
Referring now to
FIG. 2
, a conventional 6-bit data line driver circuit is illustrated. This driver circuit is responsive to a polarity selection signal (POL) (which enables the AC driving method) and includes a decoder
20
which can generate 2
6
=64 gray level voltages as inputs to an follower amplifier circuit
24
. These gray level voltages may be provided as positive or negative signals having respective magnitudes in a range from 1-5 volts (i.e., the 4 volt range is divided into 64 levels). Operation of this follower amplifier circuit
24
, which is also typically referred to as a unity gain amplifier, is more fully described in section 3.5 of a textbook by A. Sedra and K. Smith entitled “Microelectronic Circuits”, Holt, Rinehart & Winston (1982). A panel capacitor C
26
is also illustrated. The panel capacitor is representative of the combined load capacitance associated with a respective data line which is electrically connected to the source electrodes of a column of TFT access transistors T
1
.
Unfortunately, although conventional follower amplifier circuits
24
may be capable of providing a significant amount of current to a data line (DL) to thereby provide “hard” pull-up or pull-down during a selection time interval when data is being loaded into a row of display cells, such circuits
24
may only be capable of reproducing a gray level input voltage Vin on the data line (DL) to within ±20 mV of its target level. Accordingly, it may be difficult to obtain higher display resolution fidelity using larger decoders
20
(e.g., 8 bit decoders) because a 4 volt range having 2
8
=256 levels would require much smaller offset margins on the order of ±5 mV.
Thus, notwithstanding the above-described TFT-LCD devices having data line driver circuits therein which can handle 6-bit data, there continues to be a need for higher resolution display devices.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide integrated circuit display devices having high resolution and methods of operating same.
It is another object of the present invention to provide thin-film transistor (TFT) liquid crystal display (LCD) devices which utilize large numbers of gray level voltages to display images and methods of operating same.
These and other objects, features and advantages of the present invention are provided by TFT-LCD display devices having improved data line driver circuits therein. These data line driver circuits can reliably provide an increased number of gray level voltages to a TFT-LCD display panel with reduced offset voltage margins and thereby enable greater image fidelity. The data line driver circuits preferably comprise an follower amplifier which drives a data line of a display panel “hard” during a first portion of a selection time interval (when a strong pull-up or pull-down is required) and a transmission gate which performs the final “soft” pull-up or pull-down of the data line to a desired gray level voltage during a second portion of the selection time interval. The “soft” pull-up or pull-down can be utilized to reduce the offset margins of gray level voltages to within ±5 mV. Here, the selection time interval corresponds to the time interval during which a gate line of a row of display cells in the display panel is active and the TFTs in the row are turned on.
According to one embodiment of the present invention, a display device is provided having an array of display cells and a data line electrically coupled to a column of display cells in the array. A decoder is also provided which outputs a first data line signal (Vin) having a magnitude equal to a first gray level voltage, in response to an N-bit data input signal (DIN). A data line driver circuit is also provided which drives the data line with buffered and unbuffered versions of the first data line signal during first and second consecutive portions of the selection time interval, respectively. According to preferred aspects of this embodiment, the data line driver circuit comprises a follower amplifier having an input electrically coupled to an output of the decoder and an output electrically coupled to the data line, and a transmission gate electrically connected in parallel with the follower amplifier. The data line driver circuit is also responsive to a buffer control signal (CONT). In particular, the follower amplifier is active as a buffer and the transmission gate is inactive when the buffer control signal is in a first logic state (e.g., logic 0) and the transmission gate is active and the follower amplifier is inactive when the buffer control signal is in a second logic state (e.g., logic 1) opposite the first logic state.
REFERENCES:
patent: 5196738 (1993-03-01), Takahara et al.
patent: 5243333 (1993-09-01), Shiba et al.
patent: 5638091 (1997-06-01), Sarrasin
patent: 5793346 (1998-08-01), Moon
patent: 5808706 (1998-09-01), Bae
patent: 5815129 (1998-09-01), Jung
patent: 6014122 (2000-01-01), Hashimoto
patent: 6157360 (2000-12-01), Jeong et al.
patent: 5289053 (1993-11-01), None
patent: 8122733 (1996-05-01), None
Notice to Submit response, Koren Application No. 10-1998-0013127, May 31, 2000.
Kim Chang-oon
Lee Kyune-hee
Alphonse Fritz
Myers Bigel & Sibley & Sajovec
Nguyen Chanh
Samsung Electronics Co,. Ltd.
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