Thin-film transistor, free from parasitic operation

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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Details

257366, 257630, 257903, 257904, 257394, 365154, H01L 2702, H01L 2940, H01L 2978, G11C 1134

Patent

active

052818438

ABSTRACT:
First and second N-channel MOS transistors, each serving as a transfer gate, have their current paths connected, at their first ends, to bit lines, respectively, and their gates connected to a word line. Third and fourth N-channel MOS transistors, forming a flip-flop circuit, have their current paths connected, at their first ends, to the second ends of the current paths of the first and second transistors, respectively, and at their second ends, to a first power supply. The first ends of the current paths of the third and fourth transistors are connected to first ends of first and second thin-film transistors, respectively. The second ends of the current paths of the first and second thin-film transistors are connected to a second power supply. Each of the first and second thin-film transistors has first and second gates on both sides of its channel region. The first and second gates of the first thin-film transistor are connected to the gate of the fourth transistor, while the first and second gates of the second thin-film transistor are connected to the gate of the third transistor. Thus, the first and second thin-film transistors are supplied with a potential to render them nonconductive.

REFERENCES:
patent: 4566025 (1986-01-01), Jastrzebski et al.
patent: 4853894 (1989-08-01), Yamanaka et al.
patent: 4916504 (1990-04-01), Nakahara
patent: 4996575 (1991-02-01), Ipri et al.
patent: 5034797 (1991-07-01), Yamanaka et al.
patent: 5079615 (1992-01-01), Yamazaki et al.
IBM Technical Disclosure Bulletin, vol. 33, #1B, pp. 352-354, Jun. 1990 "Three-Dimensional, Six-Device, CMOS SRAM Cell Structure".

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