Thin film transistor array substrate for liquid crystal...

Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Heterojunction

Reexamination Certificate

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C257S350000, C257S443000

Reexamination Certificate

active

07005670

ABSTRACT:
In a method of fabricating a thin film transistor array substrate, an aluminum-based conductive layer is deposited onto an insulating substrate, and patterned to form a gate line assembly. The gate line assembly includes gate lines, gate electrodes, and gate pads. A gate insulating layer is formed on the substrate with the gate line assembly. A semiconductor layer, and an ohmic contact layer are sequentially formed on the gate insulating layer. A double-layered conductive film with a chrome-based under-layer and an aluminum-based over-layer is deposited onto the substrate, and patterned to form a data line assembly. The data line assembly includes data lines crossing over the gate lines, source electrodes, drain electrodes, and data pads. The chrome-based under-layer of the conductive film is patterned through dry etching while using Cl2or HCl as the dry etching gas. A protective layer is deposited onto the substrate, and patterned to thereby form contact holes exposing the drain electrodes, the gate pads, and the data pads. Indium zinc oxide is deposited onto the substrate, and patterned to thereby form pixel electrodes connected to the drain electrodes through the corresponding contact holes, and subsidiary gate and data pads connected to the gate and data pads through the corresponding contact holes.

REFERENCES:
patent: 6338989 (2002-01-01), Ahn
patent: 2000002892 (1999-04-01), None
Han et al., “A TFT manufactured by 4 masks process with new photolithography”, Asia Dispaly, pp. 1109-1112, 1998.

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