Thin film transistor array substrate and method of...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer

Reexamination Certificate

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Details

C438S157000, C438S283000, C438S149000, C257S072000

Reexamination Certificate

active

07413938

ABSTRACT:
A thin film transistor array substrate includes a gate pattern on a substrate. The gate pattern includes a gate electrode, a gate line connected to the gate electrode, and a lower gate pad electrode connected to the gate line. A source/drain pattern includes a source electrode and a drain electrode, a data line connected to the source electrode, and a lower data pad electrode connected to the data line. A semiconductor pattern is formed beneath the source/drain pattern. A transparent electrode pattern includes a pixel electrode connected to the drain electrode, an upper gate pad electrode connected to the lower gate pad electrode, and an upper data pad electrode connected to the lower data pad electrode. The thin film array substrate further includes a gate insulating pattern and a passivation film pattern stacked at remaining areas excluding areas within which the transparent electrode pattern is formed.

REFERENCES:
patent: 5153754 (1992-10-01), Whetten
patent: 5475246 (1995-12-01), Wei et al.
patent: 5943559 (1999-08-01), Maeda
patent: 6882376 (2005-04-01), Kim et al.

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