Thin film transistor array panel with common bars of...

Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Amorphous semiconductor material

Reexamination Certificate

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C257SE21703

Reexamination Certificate

active

07910927

ABSTRACT:
A gate wire and a storage electrode wire extending in a transverse direction are provided, and a data wire extending in a longitudinal direction intersects the gate wire and the storage electrode wire. A plurality of pixel electrodes and a plurality of TFTs are provided on pixel areas defined by the intersections of the data wire and the gate wire. The storage electrode wire is interconnected by a plurality of storage electrodes connections provided on the pixel areas. In this way, a common bar disposed between gate pads and a display area is omitted or has reduced width. Therefore, the fan-out areas becomes to have sufficient size to reduce the resistance difference between the signal lines.

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patent: 100552280 (2006-02-01), None

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