Thin film transistor array panel and method for...

Liquid crystal cells – elements and systems – Particular excitation of liquid crystal – Electrical excitation of liquid crystal

Reexamination Certificate

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Details

C349S144000

Reexamination Certificate

active

07843522

ABSTRACT:
A thin film transistor array panel includes a substrate, a data line and a gate electrode formed on the substrate, a insulating layer formed on the data line and the gate electrode, a semiconductor layer formed on the insulating layer, a drain electrode and a source electrode formed on the semiconductor layer, a passivation layer formed on the drain electrode and the source electrode including a first contact hole to expose a portion of the data line, a second contact hole to expose a portion of the source electrode, a third contact hole to expose a portion of the drain electrode, and a fourth contact hole to expose a portion of gate electrode, a first connector formed on the passivation layer and connected to the data line and the source electrode through the first contact hole and the second contact hole, a gate line formed on the passivation layer and connected to the gate electrode through the fourth contact hole, and a pixel electrode connected to the drain electrode through the third contact hole.

REFERENCES:
patent: 6204520 (2001-03-01), Ha et al.
patent: 7112512 (2006-09-01), Lan et al.
patent: 2004/0174483 (2004-09-01), Nakamura et al.
patent: 2005/0124088 (2005-06-01), Chen
patent: 2005/0140888 (2005-06-01), Kwon

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