Liquid crystal cells – elements and systems – Particular structure – Having significant detail of cell structure only
Reexamination Certificate
2011-01-25
2011-01-25
Qi, Mike (Department: 2871)
Liquid crystal cells, elements and systems
Particular structure
Having significant detail of cell structure only
C349S147000, C349S129000
Reexamination Certificate
active
07876412
ABSTRACT:
A method for manufacturing a TFT array panel including forming a gate line having a gate electrode on a insulating layer, a gate insulating layer on the gate line, a semiconductor on the gate insulating layer, an ohmic contact on the semiconductor, a data line having a source electrode and a drain electrode apart form the source electrode on the ohmic contact, a passivation layer having a contact hole to expose the drain electrode, and a pixel electrode connected to the drain electrode through the contact hole. The drain electrode and the source electrode are formed by a photolithography using a negative photoresist pattern. The negative photoresist pattern includes a first portion having a first thickness corresponding to a channel area, a second portion having a second thickness corresponding to a data line area, and a third portion having a third thickness corresponding to another area.
REFERENCES:
patent: 5243202 (1993-09-01), Mori et al.
patent: 5432626 (1995-07-01), Sasuga et al.
patent: 6022753 (2000-02-01), Park et al.
patent: 6037084 (2000-03-01), Ting et al.
patent: 6255130 (2001-07-01), Kim
patent: 6451635 (2002-09-01), Park et al.
patent: 6787275 (2004-09-01), Kawase
patent: 2004/0125313 (2004-07-01), Lim
patent: 08-172202 (1996-07-01), None
patent: 2002-350899 (2002-12-01), None
patent: 2004-212933 (2004-07-01), None
patent: 1020000001757 (2000-01-01), None
patent: 1020010045360 (2001-06-01), None
patent: 1020010066256 (2001-07-01), None
patent: 1020020034284 (2002-05-01), None
patent: 1020020042924 (2002-06-01), None
patent: 1020020057224 (2002-07-01), None
patent: 1020020091682 (2002-12-01), None
patent: 1020040041491 (2004-05-01), None
patent: 100436181 (2004-06-01), None
patent: 1020040066282 (2004-07-01), None
patent: 1020040085302 (2004-10-01), None
Chin Hong-Kee
Choe Hee-Hwan
Kim Sang-Gab
Kim Shi-Yul
Oh Min-Seok
Innovation Counsel LLP
Qi Mike
Samsung Electronics Co,. Ltd.
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