Thin film transistor array panel and manufacturing method...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer

Reexamination Certificate

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Details

C438S164000, C438S030000, C257S072000, C257SE21411, C349S046000

Reexamination Certificate

active

11008729

ABSTRACT:
A method of manufacturing a thin film transistor array panel is provided, which includes: forming a gate line on a substrate; depositing a first insulating layer and a semiconductor layer in sequence on the gate line; depositing a conductive layer on the semiconductor layer; photo-etching the conductive layer and the semiconductor layer; depositing a second insulating layer; photo-etching the second insulating layer to expose first and second portions of the conductive layer; forming a pixel electrode on the first portion of the conductive layer; removing the second portion of the conductive layer to expose a portion of the semiconductor layer; and forming a light blocking member on the exposed portion of the semiconductor layer, the light blocking member having an opening exposing the pixel electrode.

REFERENCES:
patent: 4885616 (1989-12-01), Ohta
patent: 4889983 (1989-12-01), Numano et al.
patent: 5084905 (1992-01-01), Sasaki et al.
patent: 5153754 (1992-10-01), Whetten
patent: 5371398 (1994-12-01), Nishihara
patent: 5677211 (1997-10-01), Kaneko
patent: 6271543 (2001-08-01), Ohtani et al.
patent: 2001/0032981 (2001-10-01), Kong et al.

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