Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Amorphous semiconductor material
Reexamination Certificate
2011-02-15
2011-02-15
Doan, Theresa T (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Non-single crystal, or recrystallized, semiconductor...
Amorphous semiconductor material
C257S072000, C257S347000, C438S149000, C438S151000
Reexamination Certificate
active
07888675
ABSTRACT:
The present invention provides a manufacturing method of a thin film transistor array panel, which includes forming a gate line on a substrate; forming a gate insulating layer, a semiconductor layer, and an ohmic contact on the gate line; forming a first conducting film including Mo, a second conducting film including Al, and a third conducting film including Mo on the ohmic contact; forming a first photoresist pattern on the third conducting film; etching the first, second, and third conducting films, the ohmic contact, and the semiconductor layer using the first photoresist pattern as a mask; removing the first photoresist pattern by a predetermined thickness to form a second photoresist pattern; etching the first, second, and third conducting films using the second photoresist pattern as a mask to expose a portion of the ohmic contact; and etching the exposed ohmic contact using a Cl-containing gas and a F-containing gas.
REFERENCES:
patent: 5712494 (1998-01-01), Akiyama et al.
patent: 6287899 (2003-08-01), Park et al.
patent: 6927420 (2005-08-01), Kim
patent: 7256076 (2007-08-01), Cho et al.
patent: 2004/0113149 (2004-06-01), Kim
patent: 2005/0158901 (2005-07-01), Yamazaki et al.
patent: 2006/0113543 (2006-06-01), Yamazaki et al.
patent: 2006/0138429 (2006-06-01), Heo
patent: 1434428 (2003-08-01), None
patent: 1501153 (2004-06-01), None
patent: 6-69236 (1994-03-01), None
patent: 6-267983 (1994-09-01), None
patent: 2000-56284 (2000-02-01), None
patent: 2004-119923 (2004-04-01), None
patent: 1999-0066167 (1999-08-01), None
patent: 2001-0091799 (2001-10-01), None
Patent Abstracts of Japan, Publication No, 06-069236, Mar. 11, 1994, 1 page.
Patent Abstracts of Japan, Publication No. 2004-119923, Apr. 15, 2004, 1 page.
Patent Abstracts of Japan, Publication No, 06-267983, Sep. 22, 1994, 1 page.
Patent Abstracts of Japan, Publication No. 2000-056284, Feb. 25, 2000, 1 page.
Korean Patent Abstract of Publication No. 1999-0066167, Aug. 16, 1998, 1 page.
Korean Patent Abstract, Publication No. 1020010091799 A, Oct. 23, 2001, 1 page.
Chin Hong-Kee
Ju Jin-ho
Kim Jang-Soo
Kim Sang-Gab
Kim Shi-Yul
Doan Theresa T
Innovation Counsel LLP
Samsung Electronics Co,. Ltd.
LandOfFree
Thin film transistor array panel and fabrication does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Thin film transistor array panel and fabrication, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Thin film transistor array panel and fabrication will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2623652