Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2000-01-03
2001-07-03
Ngô, Ngân V. (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S059000, C257S072000, C257S350000, C257S412000, C257S908000, C438S155000, C438S162000
Reexamination Certificate
active
06255706
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a thin film transistor having an improved wiring line structure and, especially, to a thin film transistor broadly used for a liquid crystal display unit, and to a method of manufacturing the same.
2. Description of the Related Art
Recent liquid crystal display units have become larger in size and higher in definition, and wiring lines used in circuits of such a unit must have lower resistances.
FIG. 1
shows a sectional structure of a thin film transistor according to prior art. A thin film transistor (hereinafter denoted as TFT) for a higher definition display unit often uses an aluminum (Al) wiring material, coping with the demand for lower resistance. By way of example,
FIG. 1
shows a gate electrode
31
formed on a glass substrate
30
using such an Al wiring material
17
. However, Al is prone to develop hillocks during a heat treatment in a subsequent process to deteriorate a dielectric strength of an insulation film in contact with an Al wiring line, and, consequently, to prevent this, a structure in which the Al wiring line is capped by a metal having a high melting point as indicated by
18
in the drawing, such as titanium (Ti), is generally used. In addition, when Al is used in source/drain electrodes
32
and
33
, a structure is employed in which the Al layer
20
is sandwiched by a barrier layer
19
for good contact with an n+-type amorphous Si layer
22
, which is a contact layer, and the prevention of the diffusion of Al, and a cap layer
21
which is also for the prevention of hillocks. The cap layer
21
is also necessary for good contact with a pixel electrode
23
of a liquid crystal display unit.
However, in such a structure, problems as shown below arise. In gate electrode
31
, interdiffusion is generated, by heat treatment in a subsequent process, between the cap layer
18
of high melting point metal showing comparatively higher resistance and the Al layer
17
, and a region of high resistance is formed centering n the neighbor of the interface therebetween, resulting in increase in wiring resistance. In addition, diffusion of impurities from the substrate
30
to the gate electrode
31
during the heat treatment causes dispersion of characteristics between TFTs. In order to cope with such problems, methods in which Ti containing nitrogen (hereinafter denoted as TiN) is used for the cap layer
21
, and an SiO film (not shown) is formed between the substrate
30
and the Al wiring layer
17
, as a block layer, are disclosed. Nevertheless, when a dry etching process is carried out, for example, overhangs are formed because TiN shows a lower etching rate than Al. This overhang causes, during subsequent formation of an insulation film on the wiring layer, deterioration of insulation performance of the insulation film by the formation of voids (cavities) on the sides of the layer of Al material underlying it. In addition, the formation of an SiO film leads to an increase in production cost because it requires a separate film forming apparatus therefor while increasing the number of steps. Also in the source/drain electrodes
32
,
33
, an increase in resistance occurs due to the above-mentioned interdiffusion.
In addition, although a method in which different wiring layers of a wiring line of three-layered structure are etched together by an etching liquid is economical and is used broadly, the following problems arise in this case. In general, a film formed by a plasma CVD process, such as a gate insulation film
35
, tends to be cracked at portions of a change in level, as shown by dashed lines
36
in
FIG. 1 and
, during etching of source/drain electrodes
32
,
33
, an etchant penetrates through the cracks to the gate electrode layer, resulting in defects in the gate electrode layer. This is serious particularly when the gate electrode
31
and the source/drain electrode
32
,
33
use the same material. Also, a structure in which an Al wiring layer is sandwiched between layers of TiN or the like is disclosed. In this case, although the problem of penetration of an etchant is avoidable because the wiring line is capable of being formed by dry etching process, the problem of an overhang configuration is unavoidable and, consequently, a degradation of the quality of the products occurs.
SUMMARY OF THE INVENTION
Taking the problems as set forth above into account, the invention aims to provide a thin film transistor which is capable of being easily manufactured, is free of an increase in resistance occurring when a material having a low resistance, such as Al or Cu, is used with the cap layer, is provided with a wiring structure having no overhang configuration, and which is also free of damage to a wiring line due to penetration of an etching liquid.
Such an object of the invention can be achieved by use of a laminated wiring structure in which a main wiring layer formed of a metal selected from Al and Cu or an alloy based on the metal is sandwiched between an underlying wiring layer and an overlaying wiring layer, the underlying and overlaying wiring layers being formed of a material based on a metal or an alloy of metals and containing nitrogen, the metal being selected from Ti, Mo, W, Cr, Al and Cu, and the materials used in the underlying and overlaying wiring layers being different from each other.
Alternatively, the above object can be achieved by use of a laminated wiring structure in which a main wiring layer formed of a metal selected from Al and Cu or an alloy based on the metals is sandwiched between an underlying wiring layer and an overlaying wiring layer, the underlying and overlaying wiring layers being formed of a material based on the same metal or alloy of metals and containing nitrogen, the metal being selected from Ti, Mo, W, Cr, Al and Cu, and contents of nitrogen in the underlying and overlaying wiring layers being different from each other.
REFERENCES:
patent: 5334860 (1994-08-01), Naito
patent: 5518936 (1996-05-01), Yamamoto et al.
patent: 5831281 (1998-11-01), Kurogane et al.
patent: 3260631 (1991-11-01), None
patent: 764109 (1995-03-01), None
patent: 9148586 (1997-06-01), None
Kida Tetsuya
Noto Hideki
Watanabe Takuya
Yaegashi Hiroyuki
Fujitsu Limited
Greer Burns & Crain Ltd.
Ngo Ngan V.
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