Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
1999-06-15
2001-07-24
Chaudhuri, Olik (Department: 2814)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S638000, C438S640000, C438S978000
Reexamination Certificate
active
06265247
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a thin-film transistor suitable as image display switching elements in active matrix type display panels and to a thin-film transistor manufacturing method.
2. Description of the Related Art
FIG. 1
is a cross-sectional view showing a structure of a bottom-gate type of thin-film transistor.
On a surface of an insulating transparent substrate
1
is positioned a gate electrode
2
of a metal having a high melting point, such as tungsten or chromium. The gate electrode
2
has both ends in a tapered shape widening toward the transparent substrate
1
. On the transparent substrate
1
, on which the gate electrode
2
is positioned, a silicon nitride film
3
and a silicon oxide film
4
are formed. The silicon nitride film
3
prevents impurities contained in the transparent substrate
1
from penetrating an active region (to be mentioned later), and the silicon oxide film
4
acts as a gate insulating film. On the silicon oxide film
4
is formed a polycrystalline silicon film
5
so as to transverse over the gate electrode
2
. The polycrystalline silicon film
5
becomes the active region of the thin-film transistor.
On the polycrystalline silicon film
5
is positioned a stopper
6
of an insulating material, such as silicon oxide. A portion of the polycrystalline silicon film
5
covered by the stopper
6
becomes a channel region
5
a
, and other portions of the polycrystalline silicon film
5
become a source region
5
s
and a drain region
5
d.
On the polycrystalline silicon film
5
, on which is formed the stopper
6
, a silicon oxide film
7
and a silicon nitride film
8
are formed. The silicon oxide film
7
and silicon nitride film
8
serve as layer insulating films to protect the polycrystalline silicon film
5
, which includes the source region
5
s
and drain region
5
d.
Contact holes
9
are formed at predetermined locations in the silicon oxide film
7
and silicon nitride film
8
on the source region
5
s
and drain region
5
d.
A source electrode
10
s
and a drain electrode
10
d,
which connect to the source region
5
s
and drain region
5
d,
are positioned at the contact holes
9
. On the silicon nitride film
8
, on which the source electrode
10
s
and drain electrode
10
d
are positioned, an acrylic resin layer
11
, which is transparent to visible light, is formed. The acrylic resin layer
11
flattens the surface by filling in the unevenness caused by the gate electrode
2
and stopper
6
and so on.
A contact hole
12
is formed in the acrylic resin layer
11
on the source electrode
10
s.
A transparent electrode
13
of indium tin oxide (ITO) that connects to the source electrode
10
s
through the contact hole
12
is then positioned so as to extend on the acrylic resin layer
11
. The transparent electrode
13
forms a pixel electrode in a liquid crystal display panel.
In the above-mentioned thin-film transistor, a plurality of which are arranged in a matrix on the transparent substrate
1
together with pixel electrodes, image data supplied to the drain electrode
10
d
is impressed onto the respective pixel electrode in response to the scanning control signal that is impressed on the gate electrode
2
.
It is preferable for the polycrystalline silicon film
5
to be formed with a sufficiently large crystal grain diameter so that it functions as the active region of the thin-film transistor. A known method for forming a large crystal grain diameter of the polycrystalline silicon film
5
is laser annealing using an excimer laser. In laser annealing, amorphous silicon is formed onto the silicon oxide film
4
, which becomes a gate insulating film, and after the hydrogen contained in the amorphous silicon is removed through a low temperature heat treatment, the silicon is irradiated with the excimer laser and is initially melted so that the silicon crystallizes. Since portions on the transparent substrate
1
reaching high temperatures are localized due to the use of this sort of laser annealing method, a glass substrate having a low melting point can be used for the transparent substrate
1
.
Due to the large amount of crystal defects, the polycrystalline silicon film
5
that was crystallized by laser annealing is not suitable as the active region of the transistor as the electrons moving within the film are easily trapped. Forming an insulating film containing a large amount of hydrogen ions on the polycrystalline silicon film
5
that was initially formed and heat treating together with the insulating film fills the crystal defects with the hydrogen ions.
Silicon nitride films are known as insulating films containing large amounts of hydrogen ions. The hydrogen ion concentration of silicon nitride films formed by plasma CVD is ordinarily about 10
22
/cm
3
, which is an order of 2 higher when compared to the hydrogen ion concentration (10
20
/cm
3
) of silicon oxide film formed by the same plasma CVD. Since transistor characteristics are degraded when this sort of silicon nitride film is formed directly on the active region, a silicon oxide film is formed between the active region and the silicon nitride film as shown in FIG.
1
.
However, at the layer insulating films in which the silicon nitride film
8
overlaps the silicon oxide film
7
, when forming the contact holes
9
by etching using a hydrofluoric acid-based etchant, a problem occurs where the contact holes
9
become wider at the bottom due to differences in the etching rates. Namely, with respect to the hydrofluoric acid-based etchant, the etching rate of the silicon oxide film
7
is faster than that of the silicon nitride film
8
, resulting in the silicon oxide film
7
part being wider than the silicon nitride film
8
part as shown in FIG.
2
. Therefore, the source electrode
10
s
or drain electrode
10
d
formed at the contact holes
9
is susceptible to disconnection, and may result in contact failure.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to improve the shape of the contact holes to be formed in the layer insulating films.
The thin-film transistor of the present invention comprises a gate electrode positioned on a substrate, a gate insulating film formed so as to cover the gate electrode on the substrate, a semiconductor film formed on the gate insulating film, interlayer insulating film formed on the semiconductor film, and an electrode connected to the semiconductor film and passing through the interlayer insulating film. The layer insulating films include a silicon nitride film, and a first and second silicon oxide films sandwiching this silicon nitride film.
Furthermore, the thin-film transistor of the present invention comprises the semiconductor film formed on the substrate, the gate insulating film formed on the semiconductor film, the gate electrode positioned on the gate insulating film so as to cross the semiconductor film, interlayer insulating film formed so as to cover the gate electrode on the gate insulating film, and an electrode connected to the semiconductor film and passing through the layer insulating film. The interlayer insulating film includes a silicon nitride film, and a first and second silicon oxide films sandwiching this silicon nitride film.
Furthermore, in the thin-film transistor of the present invention, the gate electrode and the semiconductor film are formed so as to sandwich the gate insulating film on the substrate, and interlayer insulating film, in which contact holes are formed, are formed on the semiconductor film. The interlayer insulating film comprises a lowermost insulating layer in contact with the semiconductor film and for matching with the semiconductor film, an intermediate (a middle) insulating layer formed on the lowermost insulating layer as a hydrogen ion supply source to the semiconductor film, and an uppermost insulating layer formed on the intermediate insulating layer and having an etching rate faster than that of the intermediate insulating layer with respect to etching during con
Nakanishi Shiro
Oda Nobuhiko
Cantor & Colburn LLP
Chaudhuri Olik
Pham Hoai
Sanyo Electric Co,. Ltd.
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