Thin film transistor and fabrication method thereof

Details Thin film transistor and fabrication method thereof Thin film transistor and fabrication method thereof

2002-04-29

2003-05-20

Fourson, George (Department: 2823)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

On insulating substrate or layer

C438S486000, C438S487000, C438S163000

Reexamination Certificate

active

06566180

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This present invention relates to a thin film transistor (TFT), and more particularly, to a thin film transistor for an LCD device and a fabrication method thereof.
2. Description of the Related Art
In general, liquid crystal display (LCD) devices make use of optical anisotropy and polarization properties of liquid crystal molecules to control arrangement orientation. The arrangement direction of the liquid crystal molecules can be controlled by an applied electric field. Accordingly, when an electric field is applied to liquid crystal molecules, the arrangement of the liquid crystal molecules changes. Since refraction of incident light is determined by the arrangement of the liquid crystal molecules, display of image data can be controlled by changing the electric field applied to the liquid crystal molecules.
Of the different types of known LCDs, active matrix LCDs (AM-LCDs), which have thin film transistors and pixel electrodes arranged in a matrix form, are the subject of significant research and development because of their high resolution and superiority in displaying moving images.
FIG. 1
shows a typical LCD device. The LCD device
11
includes an upper substrate
5
and a lower substrate
22
with a liquid crystal layer
14
interposed therebetween. The upper substrate
5
and the lower substrate
22
are commonly referred to as a color filter substrate and an array substrate, respectively.
In the upper substrate
5
and upon the surface opposing the lower substrate
22
, a black matrix
6
and a color filter layer
7
are formed in the shape of an array matrix and includes a plurality of red (R), green (G), and blue (B) color filters so that each color filter is surrounded by corresponding portions of the black matrix
6
. Additionally, a common electrode
18
is formed on the upper substrate
5
that covers the color filter layer
7
and the black matrix
6
. In the lower substrate
22
and upon the surface opposing the upper substrate
5
, a thin film transistor (TFT) “T” is formed in the shape of an array matrix that corresponds to the color filter layer
7
. A plurality of crossing gate lines
13
and data lines
15
are positioned such that each TFT “T” is located near each crossover point of the gate lines
13
and the data lines
15
.
Furthermore, a plurality of pixel electrodes
17
are formed on a pixel region “P” that is defined by the gate lines
13
and the data lines
15
of the lower substrate
22
. Each of the pixel electrodes
17
includes a transparent conductive material having good transmissivity such as indium-tin-oxide (ITO) or indium-zinc-oxide (IZO), for example.
According to the LCD device
11
of
FIG. 1
, a scanning signal is applied to a gate electrode of the TFT “T” through the gate line
13
, while a data signal is applied to a source electrode of the TFT “T” through the data line
15
. As a result, the liquid crystal molecules of the liquid crystal layer
14
are aligned and arranged by operation of the TFT “T”, and incident light passing through the liquid crystal layer
14
is controlled to display an image.
Within the configuration of the array substrate in the above-mentioned LCD device, an active channel is the most important part in the switching device (i.e., thin film transistor) operation. This active channel of the thin film transistor is usually made of polycrystalline silicon (poly-Si) or amorphous silicon (a-Si: H) having hydrogen.
Generally, the amorphous silicon (a-Si) is deposited on a glass substrate by thickness of 500 angstroms (Å) using PECVD (plasma-enhanced chemical vapor deposition) or LPCVD (low pressure chemical vapor deposition). However, since the active channel constituted by this amorphous silicon is unstable compared to the polycrystalline silicon (poly-Si), a dangling bond occurs in a surface of the active channel. The dangling bond traps carrier electrons such that this dangling bond impedes the flow of carrier electons in the active channel, thus reducing conductivity. Accordingly, electron mobility in the amorphous silicon active channel is much less than that in the active channel constituted by the polycrystalline silicon. Namely, if the electron mobility of the active channel constituted by the amorphous silicon is 1 cm
2
/Vs, the electron mobility of the active channel constituted by the polycrystalline silicon is scores to hundreds cm
2
/Vs. Further, the electron mobility of a thin film transistor (TFT) employing the polycrystalline silicon as the active channel depends on the grain size of the polycrystalline silicon, defects existing in the grain boundary and interface defects between a gate insulating layer and a silicon layer. Namely, the larger the grain size; the larger the electron mobility. Also, the fewer defects that exist in the grain boundary and interface between the gate insulating layer and the silicon layer, the larger the electron mobility.
However, the poly-Si TFT has large OFF current because of a large electron mobility. The major reason for this phenomenon is that the leakage current increases in the border between doped and un-doped areas of the poly-Si. On the contrary, the amorphous silicon (a-Si) has smaller OFF current than the polycrystalline silicon (poly-Si).
Therefore, in a large-sized liquid crystal panel, the poly-Si element is generally arranged in the outer part of the liquid crystal panel and used as a driving device, while the a-Si element is used as a switching device. These uses are because the driving device needs high electron mobility and the switching device needs low OFF current in order to not affect the images of the liquid crystal panel. However, the switching device advisably needs both low OFF current and high electron mobility.
FIGS. 2A
to
2
E are cross-sectional views illustrating a fabrication process for a polycrystalline silicon (poly-Si) thin film transistor (TFT) using a conventional laser crystallization method.
Referring to
FIG. 2A
, a buffer layer
2
is formed on a substrate
22
, and then an amorphous silicon (a-Si) layer
4
is deposited on the buffer layer
2
. The buffer layer
2
is made of an insulating material and serves to prevent an alkali material from extracting from the substrate
22
. After forming the amorphous silicon (a-Si), the crystallization process crystallizing the amorphous silicon layer
4
is performed using a laser beam. Thus, the a-Si is changed into poly-Si.
Thereafter, the polycrystalline silicon (poly-Si), as shown in
FIG. 2B
, is then patterned so as to form an active layer
9
in an island shape on the buffer layer
2
.
Now, referring to
FIG. 2C
, a gate insulating layer
10
and a gate electrode
12
are formed on the island-shaped active layer
9
. In order to reduce the mask processes, the gate insulating layer
10
and gate electrode
12
are simultaneously formed using the same mask. Since, the gate insulating layer
10
and the gate electrode
12
are disposed in the central portion of the active layer
9
, the active layer
9
is divided into three areas, i.e., a first active area
16
, a second active area
21
and a third active area
23
. Accordingly, the gate insulation layer
10
and gate electrode
12
are on and over the second active area
21
. The first and third active areas
16
and
23
are disposed on both sides of the active layer
9
.
Thereafter, the active layer
9
is introduced by n
+
(or p
+
) ion doping (plasma doping) using the gate electrode
12
as a mask. At this time, the gate electrode
12
acts as an ion-stopper that prevents the dopant (n
+
or p
+
ion) from penetrating into the second active area
21
. Therefore, the second active area
21
remains as a pure silicon area, while the first and third active areas
16
and
23
doped by the dopant become impure silicon areas.
During the ion doping process, the electrical characteristics of the active layer
9
change depending on the dopant. If the dopant is a Group IIIA element gas such as B
2
H
6
, the first and third active areas
16
and

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