Thin film magnetic memory device writing data of a plurality...

Static information storage and retrieval – Systems using particular element – Magnetic thin film

Reexamination Certificate

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C365S189040, C365S190000, C365S198000, C365S220000, C365S230030, C365S230060

Reexamination Certificate

active

06611454

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to a thin film magnetic memory device. More particularly, the present invention relates to a thin film magnetic memory device including magnetic memory cells whose electric resistance value varies according to the level of storage data written by a magnetic field produced by a data write current.
2. Description of the Background Art
An MRAM (Magnetic Random Access Memory) device has attracted attention as a memory device capable of non-volatile data storage with low power consumption. The MRAM device is a memory device that stores data in a non-volatile manner using a plurality of thin film magnetic elements formed in a semiconductor integrated circuit and is capable of random access to each thin film magnetic element.
In particular, recent announcement shows that the performance of the MRAM device is significantly improved by using thin film magnetic elements having a magnetic tunnel junction (MTJ) as memory cells. The MRAM device including memory cells having a magnetic tunnel junction is disclosed in technical documents such as “A 10 ns Read and Write Non-Volatile Memory Array Using a Magnetic Tunnel Junction and FET Switch in each Cell”, ISSCC Digest of Technical Papers, TA7.2, February 2000, and “Nonvolatile RAM based on Magnetic Tunnel Junction Elements”, ISSCC Digest of Technical Papers, TA7.3, February 2000.
FIG. 23
is a schematic diagram showing the structure of a magnetic memory cell having a magnetic tunnel junction (hereinafter, also simply referred to as “MTJ memory cell”).
Referring to
FIG. 23
, the MTJ memory cell includes a magnetic tunnel junction MTJ having its resistance value varying according to the storage data level, and an access transistor ATR. The access transistor ATR is formed from a field effect transistor (FET), and is coupled between the magnetic tunnel junction MTJ and the ground voltage Vss.
For the MTJ memory cell are provided a write word line WWL for instructing a data write operation, a read word line RWL for instructing a data read operation, and a bit line BL serving as a data line for transmitting an electric signal corresponding to the storage data level in the data read and write operations.
FIG. 24
is a conceptual diagram illustrating the data read operation from the MTJ memory cell.
Referring to
FIG. 24
, the magnetic tunnel junction MTJ has a magnetic layer FL having a fixed magnetic field of a fixed direction (hereinafter, also simply referred to as “fixed magnetic layer FL”), and a magnetic layer VL having a free magnetic field (hereinafter, also simply referred to as “free magnetic layer VL”). A tunnel barrier TB formed from an insulator film is provided between the fixed magnetic layer FL and the free magnetic layer VL. According to the storage data level, either a magnetic field of the same direction as that of the fixed magnetic layer FL or a magnetic field of the direction different from that of the fixed magnetic layer FL has been written to the free magnetic layer VL in a non-volatile manner.
In the data read operation, the access transistor ATR is turned ON in response to activation of the read word line RWL. As a result, a sense current Is flows through a current path formed from the bit line BL, magnetic tunnel junction MTJ, access transistor ATR and ground voltage Vss. The sense current Is is supplied as a constant data read current from a not-shown data read circuit.
The electric resistance value of the magnetic tunnel junction MTJ varies according to the relative relation of the magnetic field direction between the fixed magnetic layer FL and the free magnetic layer VL. More specifically, when the fixed magnetic layer FL and the free magnetic layer VL have the same magnetic field direction, the magnetic tunnel junction MTJ has a smaller resistance value as compared to the case where both magnetic layers have different magnetic field directions.
Accordingly, in the data read operation, a voltage drop at the magnetic tunnel junction MTJ due to the sense current Is varies according to the magnetic field direction stored in the free magnetic layer VL. Thus, by starting supply of the sense current Is with the bit line BL precharged to a high voltage, the storage data in the MTJ memory cell can be read by sensing a change in voltage level on the bit line BL.
FIG. 25
is a conceptual diagram illustrating the data write operation to the MTJ memory cell.
Referring to
FIG. 25
, in the data write operation, the read word line RWL is inactivated, so that the access transistor ATR is turned OFF. In this state, a data write current for applying a magnetic field to the free magnetic layer VL is applied to the write word line WWL and the bit line BL. The magnetic field direction of the free magnetic layer VL is determined by combination of the respective directions of the data write current flowing through the write word line WWL and the bit line BL.
FIG. 26
is a conceptual diagram illustrating the relation between the respective directions of the data write current and the magnetic field in the data write operation.
Referring to
FIG. 26
, a magnetic field Hx of the abscissa indicates the direction of a magnetic field H(WWL) produced by the data write current flowing through the write word line WWL. A magnetic field Hy of the ordinate indicates the direction of a magnetic field H(BL) produced by the data write current flowing through the bit line BL.
The magnetic field direction stored in the free magnetic layer VL is updated only when the sum of the magnetic fields H(WWL) and H(BL) reaches the region outside the asteroid characteristic line shown in the figure. In other words, the magnetic field direction stored in the free magnetic layer VL is not updated when a magnetic field corresponding to the region inside the asteroid characteristic line is applied.
Accordingly, in order to update the storage data of the MTJ memory cell by the data write operation, a current must be applied to both the write word line WWL and the bit line BL. Once the magnetic field direction, i.e., the storage data, is stored in the magnetic tunnel junction MTJ, it is retained therein in a non-volatile manner until another data read operation is conducted.
The sense current Is flows through the bit line BL in the data read operation. However, the sense current Is is generally set to a value that is smaller than the data write current by about one or two orders of magnitude. Therefore, it is less likely that the storage data in the MTJ memory cell is erroneously rewritten by the sense current Is during the data read operation.
FIG. 27
is a diagram showing the structure of the MTJ memory cell formed on a semiconductor substrate.
Referring to
FIG. 27
, the access transistor ATR is formed in a p-type region PAR of a semiconductor main substrate SUB. The access transistor ATR has source/drain regions (n-type regions)
110
,
120
and a gate
130
. The source/drain region
110
is coupled to the ground voltage Vss through a metal wiring formed in a first metal wiring layer M
1
. A metal wiring formed in a second metal wiring layer M
2
is used as the write word line WWL. The bit line BL is formed in a third metal wiring layer M
3
.
The magnetic tunnel junction MTJ is formed between the second metal wiring layer M
2
of the write word line WWL and the third metal wiring layer M
3
of the bit line BL. The source/drain region
120
of the access transistor ATR is electrically coupled to the magnetic tunnel junction MTJ through a metal film
150
formed in a contact hole, the first and second metal wiring layers M
1
and M
2
, and a barrier metal
140
. The barrier metal
140
is a buffer material for providing electrical coupling between the magnetic tunnel junction MTJ and metal wirings.
As described before, in the MTJ memory cell, the read word line RWL and the write word line WWL are provided independently of each other. The read word line RWL is provided in order to control the gate voltage of the access transistor ATR, and therefore a current need not be activ

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