Thin film magnetic memory device provided with magnetic...

Static information storage and retrieval – Systems using particular element – Magnetic thin film

Reexamination Certificate

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C365S226000

Reexamination Certificate

active

06996002

ABSTRACT:
A driver transistor supplying a data write current to a write digit line is arranged to have its gate length direction along the same direction with a write digit line. Further, the write digit line has a reinforced portion arranged between an ordinary portion corresponding to a region where memory cells are arranged and a power supply interconnection, having interconnection cross sectional area greater than that of the ordinary portion. With this configuration, the chip area can be decreased as an increase of layout pitch of the memory cells dependent on the driver transistor size is prevented, and operational reliability can also be improved as a local increase of the current density on the write digit line is avoided.

REFERENCES:
patent: 6349054 (2002-02-01), Hidaka
patent: 6788571 (2004-09-01), Ooishi et al.
patent: 6842366 (2005-01-01), Tanizaki et al.
patent: 2003/0117838 (2003-06-01), Hidaka
patent: 2003/0117869 (2003-06-01), Hidaka
Scheuerlein, et al. “A 10ns Read and Write Non-Volatile Memory Array Using a Magnetic Tunnel Junction and FET Switch in Each Cell” 2000 IEEE International Solid-State Circuits Conference Digest of Technical Papers TA 7.2.
Durlam, et al. “Nonvolatile RAM Based on Magnetic Tunnel Junction Elements” 2000 IEEE International Solid-State Circuits Conference Digest of Technical Papers TA 7.3.
Naji, et al. “A 256kb 3.0V 1T1MTJ Nonvolatile Magnetoresistive RAM” 2001 IEEE International Solid-State Circuits Conference Digest of Technical Papers (Feb. 6, 2001) 7.6.

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