Thin film magnetic memory device having an improved read...

Static information storage and retrieval – Read/write circuit – Differential sensing

Reexamination Certificate

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C365S171000, C365S189070, C365S189080, C365S203000, C365S207000

Reexamination Certificate

active

11314028

ABSTRACT:
A data bus is precharged to a precharge voltage before data read operation. In the data read operation, the data bus thus precharged is electrically coupled to the same voltage as the precharge voltage through a selected memory cell. A driving transistor couples the data bus to a power supply voltage (driving voltage) in order to supply a sense current in the data read operation. A charge transfer amplifier portion produces an output voltage according to an integral value of the sense current (data read current) flowing through the data bus, while maintaining the data bus at the precharge voltage. A transfer gate, differential amplifier and latch circuit produce read data based on the output voltage sensed at prescribed timing.

REFERENCES:
patent: 5173873 (1992-12-01), Wu et al.
patent: 5519662 (1996-05-01), Ishibashi et al.
patent: 5774181 (1998-06-01), Shyu et al.
patent: 6046929 (2000-04-01), Aoki et al.
patent: 6128239 (2000-10-01), Perner
patent: 6185143 (2001-02-01), Perner et al.
patent: 6188615 (2001-02-01), Perner et al.
patent: 6205073 (2001-03-01), Naji
patent: 6215713 (2001-04-01), Austin
patent: 6349054 (2002-02-01), Hidaka
patent: 6778430 (2004-08-01), Hidaka
patent: 2002/0093848 (2002-07-01), Thewes et al.
patent: 199 14 488 (2000-05-01), None
patent: 101 30 829 (2002-07-01), None
patent: 1 104 092 (2001-05-01), None
Durlam, M. et al., “Nonvolatile RAM based on magnetic tunnel junction elements” IEEE International Solid-State Circuits Conference, Feb. 7-9, 2000, pp. 96-97, 128-131 and 410-411.
Scheuerlein, R. et al. , “A 10ns read and write nonvolatile memory array using a magnetic tunnel junction and FET switch in each cell” IEEE International Solid-State Circuits Conference, Feb. 7-9, 2000, pp. 94-95, 128-129 and 409-410.
Yamada, K. et al., “A novel sensing scheme for a MRAM with a 5% MR ratio” Symposium on VLSI Circuits, Jun. 14-16, 2001, pp. 123-124.
Zhang, R. et al., “Windowed MRAM sensing scheme” IEEE International Workshop on Memory and Technology, Design and Testing, Aug. 7-8, 2000, pp. 47-55.
Kawashima, S. et al., “A charge-transfer amplifier and an encoded-bus architecture for low-power SRAM's” IEEE Journal of Solid-State Circuits, vol. 33, No. 5, May 1998, pp. 793-799.
Naji, et al., “A 256kb 3.0V iTiMTJ Nonvolatile Magnetoresistive RAM,” ISSCC Digest of Technical Papers, TA7.6, Feb. 2001, pp. 122-123 and 438.

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